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<html><body><samp><pre>
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<html><body><samp><pre>
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<!@TC:1484609376>
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<!@TC:1484689279>
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#Build: Synplify Pro L-2016.03L-1, Build 097R, Jul 4 2016
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#Build: Synplify Pro L-2016.03L-1, Build 097R, Jul 4 2016
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#install: C:\lscc\diamond\3.8_x64\synpbase
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#install: C:\lscc\diamond\3.8_x64\synpbase
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#OS: Windows 8 6.2
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#OS: Windows 8 6.2
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#Hostname: DESKTOP-1AUKF7V
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#Hostname: DESKTOP-1AUKF7V
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# Tue Jan 17 01:29:36 2017
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# Tue Jan 17 23:41:19 2017
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#Implementation: impl1
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#Implementation: impl1
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<a name=compilerReport9></a>Synopsys HDL Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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<a name=compilerReport9></a>Synopsys HDL Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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@N: : <!@TM:1484609376> | Running in 64-bit mode
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@N: : <!@TM:1484689280> | Running in 64-bit mode
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Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
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Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
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<a name=compilerReport10></a>Synopsys VHDL Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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<a name=compilerReport10></a>Synopsys VHDL Compiler, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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@N: : <!@TM:1484609376> | Running in 64-bit mode
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@N: : <!@TM:1484689280> | Running in 64-bit mode
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Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
|
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
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@N:<a href="@N:CD720:@XP_HELP">CD720</a> : <a href="C:\lscc\diamond\3.8_x64\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1484609376> | Setting time resolution to ns
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@N:<a href="@N:CD720:@XP_HELP">CD720</a> : <a href="C:\lscc\diamond\3.8_x64\synpbase\lib\vhd\std.vhd:123:18:123:22:@N:CD720:@XP_MSG">std.vhd(123)</a><!@TM:1484689280> | Setting time resolution to ns
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@N: : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd:15:7:15:27:@N::@XP_MSG">DisplayDriverWrapper.vhd(15)</a><!@TM:1484609376> | Top entity is set to DisplayDriverWrapper.
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@N: : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd:15:7:15:27:@N::@XP_MSG">display_driver_wrapper.vhd(15)</a><!@TM:1484689280> | Top entity is set to DisplayDriverWrapper.
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Options changed - recompiling
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File C:\lscc\diamond\3.8_x64\synpbase\lib\lucent\ecp5um.vhd changed - recompiling
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd changed - recompiling
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd changed - recompiling
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd changed - recompiling
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VHDL syntax check successful!
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VHDL syntax check successful!
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd:15:7:15:27:@N:CD630:@XP_MSG">DisplayDriverWrapper.vhd(15)</a><!@TM:1484609376> | Synthesizing work.displaydriverwrapper.arch.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd:15:7:15:27:@N:CD630:@XP_MSG">display_driver_wrapper.vhd(15)</a><!@TM:1484689280> | Synthesizing work.displaydriverwrapper.arch.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd:16:7:16:32:@N:CD630:@XP_MSG">DisplayDriverwDecoder_Top.vhd(16)</a><!@TM:1484609376> | Synthesizing work.displaydriverwdecoder_top.arch.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd:17:7:17:31:@N:CD630:@XP_MSG">display_driver_w_decoder.vhd(17)</a><!@TM:1484689280> | Synthesizing work.display_driver_w_decoder.display_driver_w_decoder_arch.
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<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd:53:11:53:20:@W:CD638:@XP_MSG">DisplayDriverwDecoder_Top.vhd(53)</a><!@TM:1484609376> | Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.</font>
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<font color=#A52A2A>@W:<a href="@W:CD638:@XP_HELP">CD638</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd:47:11:47:20:@W:CD638:@XP_MSG">display_driver_w_decoder.vhd(47)</a><!@TM:1484689280> | Signal ascii_reg is undriven. Either assign the signal a value or remove the signal declaration.</font>
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd:15:7:15:19:@N:CD630:@XP_MSG">ASCIIDecoder.vhd(15)</a><!@TM:1484609376> | Synthesizing work.asciidecoder.arch.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ascii_decoder.vhd:15:7:15:19:@N:CD630:@XP_MSG">ascii_decoder.vhd(15)</a><!@TM:1484689280> | Synthesizing work.asciidecoder.arch.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\Decoding_Table\ROM_ASCII_Decoder\DistRomAsciiDecoder\DistRomAsciiDecoder\DistRomAsciiDecoder.vhd:12:7:12:26:@N:CD630:@XP_MSG">DistRomAsciiDecoder.vhd(12)</a><!@TM:1484609376> | Synthesizing work.distromasciidecoder.structure.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\Decoding_Table\ROM_ASCII_Decoder\DistRomAsciiDecoder\DistRomAsciiDecoder\DistRomAsciiDecoder.vhd:12:7:12:26:@N:CD630:@XP_MSG">DistRomAsciiDecoder.vhd(12)</a><!@TM:1484689280> | Synthesizing work.distromasciidecoder.structure.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\lscc\diamond\3.8_x64\cae_library\synthesis\vhdl\ecp5um.vhd:801:10:801:19:@N:CD630:@XP_MSG">ecp5um.vhd(801)</a><!@TM:1484609376> | Synthesizing work.rom128x1a.syn_black_box.
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@N:<a href="@N:CD630:@XP_HELP">CD630</a> : <a href="C:\lscc\diamond\3.8_x64\cae_library\synthesis\vhdl\ecp5um.vhd:801:10:801:19:@N:CD630:@XP_MSG">ecp5um.vhd(801)</a><!@TM:1484689280> | Synthesizing work.rom128x1a.syn_black_box.
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Post processing for work.rom128x1a.syn_black_box
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Post processing for work.rom128x1a.syn_black_box
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Post processing for work.distromasciidecoder.structure
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Post processing for work.distromasciidecoder.structure
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Post processing for work.asciidecoder.arch
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Post processing for work.asciidecoder.arch
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Post processing for work.displaydriverwdecoder_top.arch
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Post processing for work.display_driver_w_decoder.display_driver_w_decoder_arch
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Post processing for work.displaydriverwrapper.arch
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Post processing for work.displaydriverwrapper.arch
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@N:<a href="@N:CL159:@XP_HELP">CL159</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd:17:8:17:11:@N:CL159:@XP_MSG">ASCIIDecoder.vhd(17)</a><!@TM:1484609376> | Input clk is unused.
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@N:<a href="@N:CL159:@XP_HELP">CL159</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ascii_decoder.vhd:17:8:17:11:@N:CL159:@XP_MSG">ascii_decoder.vhd(17)</a><!@TM:1484689280> | Input clk is unused.
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@N:<a href="@N:CL159:@XP_HELP">CL159</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ASCIIDecoder.vhd:18:8:18:13:@N:CL159:@XP_MSG">ASCIIDecoder.vhd(18)</a><!@TM:1484609376> | Input reset is unused.
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@N:<a href="@N:CL159:@XP_HELP">CL159</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\ascii_decoder.vhd:18:8:18:13:@N:CL159:@XP_MSG">ascii_decoder.vhd(18)</a><!@TM:1484689280> | Input reset is unused.
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@N:<a href="@N:CL159:@XP_HELP">CL159</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverwDecoder_Top.vhd:29:8:29:13:@N:CL159:@XP_MSG">DisplayDriverwDecoder_Top.vhd(29)</a><!@TM:1484609376> | Input wr_en is unused.
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@N:<a href="@N:CL159:@XP_HELP">CL159</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_w_decoder.vhd:23:8:23:13:@N:CL159:@XP_MSG">display_driver_w_decoder.vhd(23)</a><!@TM:1484689280> | Input wr_en is unused.
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At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB)
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At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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Process completed successfully.
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# Tue Jan 17 01:29:36 2017
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# Tue Jan 17 23:41:20 2017
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###########################################################]
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###########################################################]
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<a name=compilerReport11></a>Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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<a name=compilerReport11></a>Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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@N: : <!@TM:1484609376> | Running in 64-bit mode
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@N: : <!@TM:1484689280> | Running in 64-bit mode
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\layer0.srs changed - recompiling
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\layer0.srs changed - recompiling
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">DisplayDriverWrapper.vhd(15)</a><!@TM:1484609376> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">display_driver_wrapper.vhd(15)</a><!@TM:1484689280> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">DisplayDriverWrapper.vhd(15)</a><!@TM:1484609376> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">display_driver_wrapper.vhd(15)</a><!@TM:1484689280> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
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At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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Process completed successfully.
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# Tue Jan 17 01:29:36 2017
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# Tue Jan 17 23:41:20 2017
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###########################################################]
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###########################################################]
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@END
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@END
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At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)
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At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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Process completed successfully.
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# Tue Jan 17 01:29:36 2017
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# Tue Jan 17 23:41:20 2017
|
|
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###########################################################]
|
###########################################################]
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<a name=compilerReport12></a>Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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<a name=compilerReport12></a>Synopsys Netlist Linker, version comp2016q2rc, Build 192R, built Jul 5 2016</a>
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@N: : <!@TM:1484609377> | Running in 64-bit mode
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@N: : <!@TM:1484689281> | Running in 64-bit mode
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\impl1_comp.srs changed - recompiling
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File C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\impl1_comp.srs changed - recompiling
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">DisplayDriverWrapper.vhd(15)</a><!@TM:1484609377> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">display_driver_wrapper.vhd(15)</a><!@TM:1484689281> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\DisplayDriverWrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">DisplayDriverWrapper.vhd(15)</a><!@TM:1484609377> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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@N:<a href="@N:NF107:@XP_HELP">NF107</a> : <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Sources\display_driver_wrapper.vhd:15:7:15:27:@N:NF107:@XP_MSG">display_driver_wrapper.vhd(15)</a><!@TM:1484689281> | Selected library: work cell: DisplayDriverWrapper view arch as top level
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At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
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At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 67MB peak: 68MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process completed successfully.
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Process completed successfully.
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# Tue Jan 17 01:29:37 2017
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# Tue Jan 17 23:41:21 2017
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###########################################################]
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###########################################################]
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Pre-mapping Report
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Pre-mapping Report
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<a name=mapperReport13></a>Synopsys Lattice Technology Pre-mapping, Version maplat, Build 1498R, Built Jul 5 2016 10:30:31</a>
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<a name=mapperReport13></a>Synopsys Lattice Technology Pre-mapping, Version maplat, Build 1498R, Built Jul 5 2016 10:30:31</a>
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Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
|
Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
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Product Version L-2016.03L-1
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Product Version L-2016.03L-1
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Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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@A:<a href="@A:MF827:@XP_HELP">MF827</a> : <!@TM:1484609378> | No constraint file specified.
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@A:<a href="@A:MF827:@XP_HELP">MF827</a> : <!@TM:1484689282> | No constraint file specified.
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Linked File: <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1_scck.rpt:@XP_FILE">impl1_scck.rpt</a>
|
Linked File: <a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1_scck.rpt:@XP_FILE">impl1_scck.rpt</a>
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Printing clock summary report in "C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1_scck.rpt" file
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Printing clock summary report in "C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1_scck.rpt" file
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@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1484609378> | Running in 64-bit mode.
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@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1484689282> | Running in 64-bit mode.
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@N:<a href="@N:MF666:@XP_HELP">MF666</a> : <!@TM:1484609378> | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)
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@N:<a href="@N:MF666:@XP_HELP">MF666</a> : <!@TM:1484689282> | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)
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Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 102MB)
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Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 102MB)
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Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 102MB)
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Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 102MB)
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| Line 124... |
Line 127... |
---------------------------------------------------------------------------------------------------------------------------------------------------------
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---------------------------------------------------------------------------------------------------------------------------------------------------------
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DisplayDriverWrapper|bttn_state_derived_clock 1.0 MHz 1000.000 derived (from DisplayDriverWrapper|clk) Autoconstr_clkgroup_0 8
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DisplayDriverWrapper|bttn_state_derived_clock 1.0 MHz 1000.000 derived (from DisplayDriverWrapper|clk) Autoconstr_clkgroup_0 8
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DisplayDriverWrapper|clk 1.0 MHz 1000.000 inferred Autoconstr_clkgroup_0 5
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DisplayDriverWrapper|clk 1.0 MHz 1000.000 inferred Autoconstr_clkgroup_0 5
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=========================================================================================================================================================
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=========================================================================================================================================================
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<font color=#A52A2A>@W:<a href="@W:MT529:@XP_HELP">MT529</a> : <a href="c:\projects\single-14-segment-display-driver-w-decoder\project\sources\displaydriverwrapper.vhd:57:4:57:6:@W:MT529:@XP_MSG">displaydriverwrapper.vhd(57)</a><!@TM:1484609378> | Found inferred clock DisplayDriverWrapper|clk which controls 5 sequential elements including bttn_state. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. </font>
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<font color=#A52A2A>@W:<a href="@W:MT529:@XP_HELP">MT529</a> : <a href="c:\projects\single-14-segment-display-driver-w-decoder\project\sources\display_driver_wrapper.vhd:57:4:57:6:@W:MT529:@XP_MSG">display_driver_wrapper.vhd(57)</a><!@TM:1484689282> | Found inferred clock DisplayDriverWrapper|clk which controls 5 sequential elements including bttn_state. This clock has no specified timing constraint which may prevent conversion of gated or generated clocks and may adversely impact design performance. </font>
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Finished Pre Mapping Phase.
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Finished Pre Mapping Phase.
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Starting constraint checker (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 140MB peak: 142MB)
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Starting constraint checker (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 140MB peak: 142MB)
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| Line 140... |
Line 143... |
Pre-mapping successful!
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Pre-mapping successful!
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At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 55MB peak: 142MB)
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At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 55MB peak: 142MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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# Tue Jan 17 01:29:38 2017
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# Tue Jan 17 23:41:22 2017
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###########################################################]
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###########################################################]
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Map & Optimize Report
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Map & Optimize Report
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<a name=mapperReport15></a>Synopsys Lattice Technology Mapper, Version maplat, Build 1498R, Built Jul 5 2016 10:30:31</a>
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<a name=mapperReport15></a>Synopsys Lattice Technology Mapper, Version maplat, Build 1498R, Built Jul 5 2016 10:30:31</a>
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Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
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Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.
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Product Version L-2016.03L-1
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Product Version L-2016.03L-1
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Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1484609380> | Running in 64-bit mode.
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@N:<a href="@N:MF248:@XP_HELP">MF248</a> : <!@TM:1484689284> | Running in 64-bit mode.
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@N:<a href="@N:MF666:@XP_HELP">MF666</a> : <!@TM:1484609380> | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)
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@N:<a href="@N:MF666:@XP_HELP">MF666</a> : <!@TM:1484689284> | Clock conversion enabled. (Command "set_option -fix_gated_and_generated_clocks 1" in the project file.)
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Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)
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| Line 173... |
Line 176... |
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Available hyper_sources - for debug and ip models
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Available hyper_sources - for debug and ip models
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None Found
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None Found
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@N:<a href="@N:MT206:@XP_HELP">MT206</a> : <!@TM:1484609380> | Auto Constrain mode is enabled
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@N:<a href="@N:MT206:@XP_HELP">MT206</a> : <!@TM:1484689284> | Auto Constrain mode is enabled
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Finished RTL optimizations (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Finished RTL optimizations (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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@N: : <a href="c:\projects\single-14-segment-display-driver-w-decoder\project\sources\displaydriverwrapper.vhd:77:4:77:6:@N::@XP_MSG">displaydriverwrapper.vhd(77)</a><!@TM:1484609380> | Found counter in view:work.DisplayDriverWrapper(arch) inst symbol_scan_cntr[7:0]
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@N: : <a href="c:\projects\single-14-segment-display-driver-w-decoder\project\sources\display_driver_wrapper.vhd:77:4:77:6:@N::@XP_MSG">display_driver_wrapper.vhd(77)</a><!@TM:1484689284> | Found counter in view:work.DisplayDriverWrapper(arch) inst symbol_scan_cntr[7:0]
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Starting factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Starting factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Finished factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Finished factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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| Line 217... |
Line 220... |
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4 0h:00m:00s -0.58ns 6 / 13
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4 0h:00m:00s -0.58ns 6 / 13
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Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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@N:<a href="@N:FX164:@XP_HELP">FX164</a> : <!@TM:1484609380> | The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute.
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@N:<a href="@N:FX164:@XP_HELP">FX164</a> : <!@TM:1484689284> | The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute.
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Finished restoring hierarchy (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 140MB peak: 141MB)
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Finished restoring hierarchy (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 140MB peak: 141MB)
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@N:<a href="@N:MT611:@XP_HELP">MT611</a> : <!@TM:1484609380> | Automatically generated clock DisplayDriverWrapper|bttn_state_derived_clock is not used and is being removed
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@N:<a href="@N:MT611:@XP_HELP">MT611</a> : <!@TM:1484689284> | Automatically generated clock DisplayDriverWrapper|bttn_state_derived_clock is not used and is being removed
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@S |Clock Optimization Summary
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@S |Clock Optimization Summary
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| Line 250... |
Line 253... |
Writing Analyst data base C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\impl1_m.srm
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Writing Analyst data base C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synwork\impl1_m.srm
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Finished Writing Netlist Databases (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Finished Writing Netlist Databases (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 139MB peak: 141MB)
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Writing EDIF Netlist and constraint files
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Writing EDIF Netlist and constraint files
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@N:<a href="@N:FX1056:@XP_HELP">FX1056</a> : <!@TM:1484609380> | Writing EDF file: C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1.edi
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@N:<a href="@N:FX1056:@XP_HELP">FX1056</a> : <!@TM:1484689284> | Writing EDF file: C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1.edi
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L-2016.03L-1
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L-2016.03L-1
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@N:<a href="@N:BW106:@XP_HELP">BW106</a> : <!@TM:1484609380> | Synplicity Constraint File capacitance units using default value of 1pF
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@N:<a href="@N:BW106:@XP_HELP">BW106</a> : <!@TM:1484689284> | Synplicity Constraint File capacitance units using default value of 1pF
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Finished Writing EDIF Netlist and constraint files (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 145MB)
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Finished Writing EDIF Netlist and constraint files (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 143MB peak: 145MB)
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Start final timing analysis (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 143MB peak: 145MB)
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Start final timing analysis (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 143MB peak: 145MB)
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<font color=#A52A2A>@W:<a href="@W:MT420:@XP_HELP">MT420</a> : <!@TM:1484609380> | Found inferred clock DisplayDriverWrapper|clk with period 2.30ns. Please declare a user-defined clock on object "p:clk"</font>
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<font color=#A52A2A>@W:<a href="@W:MT420:@XP_HELP">MT420</a> : <!@TM:1484689284> | Found inferred clock DisplayDriverWrapper|clk with period 2.30ns. Please declare a user-defined clock on object "p:clk"</font>
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<a name=timingReport17></a>##### START OF TIMING REPORT #####[</a>
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<a name=timingReport17></a>##### START OF TIMING REPORT #####[</a>
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# Timing Report written on Tue Jan 17 01:29:40 2017
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# Timing Report written on Tue Jan 17 23:41:24 2017
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#
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#
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Top view: DisplayDriverWrapper
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Top view: DisplayDriverWrapper
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Requested Frequency: 433.9 MHz
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Requested Frequency: 433.9 MHz
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Wire load mode: top
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Wire load mode: top
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Paths requested: 5
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Paths requested: 5
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Constraint File(s):
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Constraint File(s):
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@N:<a href="@N:MT320:@XP_HELP">MT320</a> : <!@TM:1484609380> | Timing report estimates place and route data. Please look at the place and route timing report for final timing.
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@N:<a href="@N:MT320:@XP_HELP">MT320</a> : <!@TM:1484689284> | Timing report estimates place and route data. Please look at the place and route timing report for final timing.
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@N:<a href="@N:MT322:@XP_HELP">MT322</a> : <!@TM:1484609380> | Clock constraints cover only FF-to-FF paths associated with the clock.
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@N:<a href="@N:MT322:@XP_HELP">MT322</a> : <!@TM:1484689284> | Clock constraints cover only FF-to-FF paths associated with the clock.
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<a name=performanceSummary18></a>Performance Summary</a>
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<a name=performanceSummary18></a>Performance Summary</a>
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*******************
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*******************
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| Line 363... |
Line 366... |
================================================================================================================================
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================================================================================================================================
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<a name=worstPaths24></a>Worst Path Information</a>
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<a name=worstPaths24></a>Worst Path Information</a>
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<a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1.srr:srsfC:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1.srs:fp:23218:24892:@XP_NAMES_GATE">View Worst Path in Analyst</a>
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<a href="C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1.srr:srsfC:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\impl1.srs:fp:23703:25377:@XP_NAMES_GATE">View Worst Path in Analyst</a>
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***********************
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***********************
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Path information for path number 1:
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Path information for path number 1:
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Requested Period: 2.305
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Requested Period: 2.305
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| Line 595... |
Line 598... |
Mapper successful!
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Mapper successful!
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At Mapper Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 31MB peak: 145MB)
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At Mapper Exit (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 31MB peak: 145MB)
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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Process took 0h:00m:01s realtime, 0h:00m:01s cputime
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# Tue Jan 17 01:29:40 2017
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# Tue Jan 17 23:41:24 2017
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###########################################################]
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###########################################################]
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</pre></samp></body></html>
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</pre></samp></body></html>
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