OpenCores
URL https://opencores.org/ocsvn/soc_maker/soc_maker/trunk

Subversion Repositories soc_maker

[/] [soc_maker/] [trunk/] [core_lib/] [cores/] [or1200_rel2/] [01_or1200.yaml] - Diff between revs 5 and 7

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 5 Rev 7
Line 16... Line 16... 
    ports:
 
    ports:
 
      :clmode_i: SOCM_PORT
 
      :clmode_i: SOCM_PORT
 
        len: 2
 
        len: 2
 
        defn: single
 
        defn: single
 
 
 
 
 
  :pic_inst: SOCM_IFC
 
  :pic_ints: SOCM_IFC
 
    name: single
 
    name: single
 
    dir: 1
 
    dir: 1
 
    version: "1"
 
    version: "1"
 
    ports:
 
    ports:
 
      :pic_inst_i: SOCM_PORT
 
      :pic_ints_i: SOCM_PORT
 
        len: 2
 
        len: 20
 
        defn: single
 
        defn: single
 
 
 
 
 
  :clk: SOCM_IFC
 
  :clk: SOCM_IFC
 
    name: clk
 
    name: clk
 
    dir: 1
 
    dir: 1
 
    version: "1"
 
    version: "1"
 
    ports:
 
    ports:
 
      :clk_i: SOCM_PORT
 
      :clk_i: SOCM_PORT
 
        len: 2
 
        len: 1
 
        defn: clk
 
        defn: clk
 
 
 
 
 
  :rst: SOCM_IFC
 
  :rst: SOCM_IFC
 
    name: rst
 
    name: rst
 
    dir: 1
 
    dir: 1
 
    version: "1"
 
    version: "1"
 
    ports:
 
    ports:
 
      :rst_i: SOCM_PORT
 
      :rst_i: SOCM_PORT
 
        len: 2
 
        len: 1
 
        defn: rst
 
        defn: rst
 
 
 
 
 
  :wb_instruction: SOCM_IFC
 
  :wb_instruction: SOCM_IFC
 
    name: wishbone_ma
 
    name: wishbone_ma
 
    dir: 1
 
    dir: 1
 
    version: "b3"
 
    version: "b3"
 
    ports:
 
    ports:
 
 
 
      :iwb_clk_i: SOCM_PORT
 
 
 
        defn: clk
 
 
 
        len:  1
 
 
 
      :iwb_rst_i: SOCM_PORT
 
 
 
        defn: rst
 
 
 
        len:  1
 
      :iwb_cyc_o: SOCM_PORT
 
      :iwb_cyc_o: SOCM_PORT
 
        defn: cyc
 
        defn: cyc
 
        len:  1
 
        len:  1
 
      :iwb_stb_o: SOCM_PORT
 
      :iwb_stb_o: SOCM_PORT
 
        defn: stb
 
        defn: stb
Line 59... Line 65... 
      :iwb_adr_o: SOCM_PORT
 
      :iwb_adr_o: SOCM_PORT
 
        defn: adr
 
        defn: adr
 
        len:  32
 
        len:  32
 
      :iwb_sel_o: SOCM_PORT
 
      :iwb_sel_o: SOCM_PORT
 
        defn: sel
 
        defn: sel
 
        len:  1
 
        len:  4
 
      :iwb_we_o: SOCM_PORT
 
      :iwb_we_o: SOCM_PORT
 
        defn: we
 
        defn: we
 
        len:  1
 
        len:  1
 
      :iwb_dat_o: SOCM_PORT
 
      :iwb_dat_o: SOCM_PORT
 
        defn: dat_i
 
        defn: dat_i
Line 76... Line 82... 
        len:  1
 
        len:  1
 
      :iwb_err_i: SOCM_PORT
 
      :iwb_err_i: SOCM_PORT
 
        defn: err
 
        defn: err
 
        len:  1
 
        len:  1
 
      :iwb_rty_i: SOCM_PORT
 
      :iwb_rty_i: SOCM_PORT
 
        defn: err
 
        defn: rty
 
        len:  1
 
        len:  1
 
 
 
 
 
  :wb_data: SOCM_IFC
 
  :wb_data: SOCM_IFC
 
    name: wishbone_ma
 
    name: wishbone_ma
 
    dir: 1
 
    dir: 1
 
    version: "b3"
 
    version: "b3"
 
    ports:
 
    ports:
 
 
 
      :dwb_clk_i: SOCM_PORT
 
 
 
        defn: clk
 
 
 
        len:  1
 
 
 
      :dwb_rst_i: SOCM_PORT
 
 
 
        defn: rst
 
 
 
        len:  1
 
      :dwb_cyc_o: SOCM_PORT
 
      :dwb_cyc_o: SOCM_PORT
 
        defn: cyc
 
        defn: cyc
 
        len:  1
 
        len:  1
 
      :dwb_stb_o: SOCM_PORT
 
      :dwb_stb_o: SOCM_PORT
 
        defn: stb
 
        defn: stb
Line 95... Line 107... 
      :dwb_adr_o: SOCM_PORT
 
      :dwb_adr_o: SOCM_PORT
 
        defn: adr
 
        defn: adr
 
        len:  32
 
        len:  32
 
      :dwb_sel_o: SOCM_PORT
 
      :dwb_sel_o: SOCM_PORT
 
        defn: sel
 
        defn: sel
 
        len:  1
 
        len:  4
 
      :dwb_we_o: SOCM_PORT
 
      :dwb_we_o: SOCM_PORT
 
        defn: we
 
        defn: we
 
        len:  1
 
        len:  1
 
      :dwb_dat_o: SOCM_PORT
 
      :dwb_dat_o: SOCM_PORT
 
        defn: dat_i
 
        defn: dat_i
 
        len:  32
 
        len:  32
 
      :dwb_dat_i: SOCM_PORT
 
      :dwb_dat_i: SOCM_PORT
 
        defn: dat_i
 
        defn: dat_o
 
        len:  32
 
        len:  32
 
      :dwb_ack_i: SOCM_PORT
 
      :dwb_ack_i: SOCM_PORT
 
        defn: ack
 
        defn: ack
 
        len:  1
 
        len:  1
 
      :dwb_err_i: SOCM_PORT
 
      :dwb_err_i: SOCM_PORT
 
        defn: err
 
        defn: err
 
        len:  1
 
        len:  1
 
      :dwb_rty_i: SOCM_PORT
 
      :dwb_rty_i: SOCM_PORT
 
        defn: err
 
        defn: rty
 
        len:  1
 
        len:  1
 
 
 
 
 
  :ext_debug: SOCM_IFC
 
  :ext_debug: SOCM_IFC
 
    name: debug
 
    name: debug
 
    dir: 1
 
    dir: 1
Line 149... Line 161... 
      :dbg_adr_i: SOCM_PORT
 
      :dbg_adr_i: SOCM_PORT
 
        len: 32
 
        len: 32
 
        defn: dbg_adr
 
        defn: dbg_adr
 
      :dbg_dat_i: SOCM_PORT
 
      :dbg_dat_i: SOCM_PORT
 
        len: 32
 
        len: 32
 
        defn: dbg_dat
 
        defn: dbg_dat_o
 
      :dbg_dat_o: SOCM_PORT
 
      :dbg_dat_o: SOCM_PORT
 
        len: 32
 
        len: 32
 
        defn: dbg_dat
 
        defn: dbg_dat_i
 
      :dbg_ack_o: SOCM_PORT
 
      :dbg_ack_o: SOCM_PORT
 
        len: 1
 
        len: 1
 
        defn: dbg_ack
 
        defn: dbg_ack
 
 
 
 
 
  :pow_man: SOCM_IFC
 
  :pow_man: SOCM_IFC

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.