URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [digilentinc.com/] [Nexys2/] [ip/] [clock/] [rtl/] [xml/] [cde_clock_sys.xml] - Diff between revs 131 and 135

Rev 131	Rev 135
Line 25...	Line 25...
`// You should have received a copy of the GNU Lesser General //`	`// You should have received a copy of the GNU Lesser General //`
`// Public License along with this source; if not, download it //`	`// Public License along with this source; if not, download it //`
`// from http://www.opencores.org/lgpl.shtml //`	`// from http://www.opencores.org/lgpl.shtml //`
`// //`	`// //`
`-->`	`-->`

`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`	`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
`xmlns:socgen="http://opencores.org"`	`xmlns:socgen="http://opencores.org"`
`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`	`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`	`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`

`digilentinc.com`	`digilentinc.com`
`Nexys2`	`Nexys2`
`clock`	`clock`
`sys default`	`sys`













`fs-syn`	`fs-syn`


`dest_dir`	`dest_dir`
`../verilog/syn/`	`../verilog/syn/`
`verilogSource`	`verilogSource`
`libraryDir`	`libraryDir`




`../verilog/copyright.v`
`verilogSourceinclude`


















`syn:Synthesis:`	`syn:Synthesis:`

`Verilog`	`Verilog`


`fs-syn`	`fs-syn`