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[/] [socgen/] [trunk/] [Projects/] [digilentinc.com/] [Nexys2/] [ip/] [fpga/] [rtl/] [xml/] [Nexys2_fpga_core.xml] - Diff between revs 131 and 133

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Rev 131	Rev 133
Line 84...	Line 84...



`select`	`select`
`jtag_select`	`jtag_select`
`JTAG_SEL-10`





Line 98...	Line 98...



`tdo`	`tdo`
`jtag_tdo`	`jtag_tdo`
`JTAG_SEL-10`





Line 111...	Line 111...





	`aux_jtag`






	`test_logic_reset`
	`aux_jtag_test_logic_reset`



	`shift_dr`
	`aux_jtag_shift_dr`




	`capture_dr`
	`aux_jtag_capture_dr`





	`shiftcapture_dr_clk`
	`aux_jtag_shiftcapture_dr_clk`





	`update_dr_clk`
	`aux_jtag_update_dr_clk`




	`select`
	`aux_jtag_select`






	`tdi`
	`aux_jtag_tdi`




	`tdo`
	`aux_jtag_tdo`
















`slave_clk`	`slave_clk`

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