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<meta name="Info 4" content="">
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<meta name="Info 4" content="">
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<meta name="date" content="2008-01-08T12:01:41-0500">
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<meta name="date" content="2008-01-08T12:01:41-0500">
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<meta name="robots" content="index,follow">
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<meta name="robots" content="index,follow">
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</head>
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</head>
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<body dir="ltr" lang="en-US">
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<body dir="ltr" lang="en-US">
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<h1><a name="Datasheet"></a>SOCGEN Datasheet:<br>
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<h1><a name="cpu_def"></a>SOCGEN Datasheet:<br>
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</h1>
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</h1>
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<div id="toc__inside" dir="ltr">
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<div id="toc__inside" dir="ltr">
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<ul>
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<ul>
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<li>
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<li>
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<ul>
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<p style="margin-bottom: 0in;"><a href="#cpu_def">cpu_def<br>
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</a></p>
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<br>
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<br>
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<br>
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<li>
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<p><a href="../src/cpu_def.v">SourceCode <br>
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</a></p>
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<li>
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<p style="margin-bottom: 0in;"><a href="#Parameters">Parameters<br>
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</a></p>
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</li>
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<li>
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<li>
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<p style="margin-bottom: 0in;"><a href="#Description">Description<br>
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<p style="margin-bottom: 0in;"><a href="#Interface">Interface<br>
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</a></p>
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</a></p>
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</li>
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</li>
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<li>
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<li>
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<p style="margin-bottom: 0in;"><a href="#TheoryofOperation">Theory of Operation<br>
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<p style="margin-bottom: 0in;"><a href="#Children">Children<br>
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</a></p>
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</li>
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<li>
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<p><a href="../../html/cpu_def.html#TheoryofOperation">Theory of Operation<br>
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</a></p>
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</a></p>
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</ul>
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</ul>
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</li>
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<img style="width: 482.25px; height: 302px;" alt="" src="../png/cpu_def_sym.png"><br>
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<b><br>
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<h2><b><a name="Parameters"></a>Parameters<br></b></h2>
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<b><br>
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<br>
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</b>
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<table style="text-align: left; width: 640px; height: 120px;" border="8" cellpadding="4" cellspacing="4">
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<tr>
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<td style="vertical-align: top;">Name<br> </td>
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<td style="vertical-align: top;">default <br> </td>
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<td style="vertical-align: top;">Description<br></td>
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</tr>
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<tr>
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<td style="vertical-align: top;">BOOT_VEC<br> </td>
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<td style="vertical-align: top;">8'hfc<br> </td>
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<td style="vertical-align: top;"><br></td>
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<td style="vertical-align: top;">CPU_ADD<br> </td>
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<td style="vertical-align: top;">16<br> </td>
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<td style="vertical-align: top;"><br></td>
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<td style="vertical-align: top;">PROG_ROM_ADD<br> </td>
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<td style="vertical-align: top;">0<br> </td>
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<td style="vertical-align: top;">PROG_ROM_WIDTH<br> </td>
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<td style="vertical-align: top;">16<br> </td>
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<td style="vertical-align: top;">PROG_ROM_WORDS<br> </td>
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<td style="vertical-align: top;">0<br> </td>
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<td style="vertical-align: top;">STACK_RAM_SIZE<br> </td>
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<td style="vertical-align: top;">8<br> </td>
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<tr>
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<td style="vertical-align: top;">STACK_RAM_WIDTH<br> </td>
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<td style="vertical-align: top;">16<br> </td>
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<td style="vertical-align: top;">STACK_RAM_WORDS<br> </td>
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<td style="vertical-align: top;">256<br> </td>
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<td style="vertical-align: top;">VEC_TABLE<br> </td>
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<td style="vertical-align: top;">8'hff<br> </td>
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<p><b><b><br>
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<p><b><b><br>
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<p><b><b><br>
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<h2><b><b><a name="Interface"></a>Interface</b><b> <br>
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<td style="vertical-align: top;">NAME<br> </td>
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<td style="vertical-align: top;">Type<br> </td>
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<td style="vertical-align: top;">Description<br> </td>
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<td style="vertical-align: top;">clk<br> </td>
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<td style="vertical-align: top;">input<br> </td>
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<td style="vertical-align: top;">enable<br> </td>
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<td style="vertical-align: top;">input<br> </td>
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<td style="vertical-align: top;">nmi<br> </td>
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<td style="vertical-align: top;">reset<br> </td>
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<td style="vertical-align: top;">input<br> </td>
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<td style="vertical-align: top;">pg0_data[7:0]<br> </td>
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<td style="vertical-align: top;">input<br> </td>
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<td style="vertical-align: top;">rdata[15:0]<br> </td>
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<td style="vertical-align: top;">input<br> </td>
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<td style="vertical-align: top;">vec_int[7:0]<br> </td>
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<td style="vertical-align: top;">input<br> </td>
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<td style="vertical-align: top;">pg0_rd<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;">pg0_wr<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;">rd<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;">wr<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;">addr[CPU_ADD-1:0]<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;"><br> </td>
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</tr>
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<td style="vertical-align: top;">alu_status[7:0]<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;"><br> </td>
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<td style="vertical-align: top;">pg0_add[7:0]<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;">wdata[7:0]<br> </td>
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<td style="vertical-align: top;">output<br> </td>
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<td style="vertical-align: top;"><br> </td>
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</tr>
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</tbody>
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</table>
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<p><b><b><br>
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<h2><b><a name="Children"></a>Children<br></b></h2>
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</b>
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<table style="text-align: left; width: 640px; height: 120px;" border="8" cellpadding="4" cellspacing="4">
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<td style="vertical-align: top;">Instance<br> </td>
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<td style="vertical-align: top;">Vendor<br> </td>
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<td style="vertical-align: top;">Library<br></td>
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<td style="vertical-align: top;">Component<br></td>
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<td style="vertical-align: top;">Version<br></td>
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</tr>
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<tr>
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<td style="vertical-align: top;">core<br> </td>
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<td style="vertical-align: top;">opencores.org<br> </td>
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<td style="vertical-align: top;">Mos6502<br></td>
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<td style="vertical-align: top;">core<br></td>
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<td style="vertical-align: top;">def<br></td>
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</tr>
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<tr>
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<td style="vertical-align: top;">stack_ram<br> </td>
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<td style="vertical-align: top;">opencores.org<br> </td>
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<td style="vertical-align: top;">cde<br></td>
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<td style="vertical-align: top;">lifo<br></td>
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<td style="vertical-align: top;">def<br></td>
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<td style="vertical-align: top;">prog_rom<br> </td>
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<td style="vertical-align: top;">opencores.org<br> </td>
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<td style="vertical-align: top;">cde<br></td>
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<td style="vertical-align: top;">sram<br></td>
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<td style="vertical-align: top;">dp<br></td>
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</table>
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<img style="width: 482.25px; height: 302px;" alt="" src="../png/cpu_def_sch.png"><br>
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<h2><b><a name="Description"></a>Description</b></h2>
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<h2><b><a name="TheoryofOperation"></a>Theory of Operation<br></b></h2>
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