URL
https://opencores.org/ocsvn/socgen/socgen/trunk
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// Generated File Do Not EDIT //
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// Generated File Do Not EDIT //
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// //
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// //
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// ./tools/verilog/gen_tb -vendor opencores.org -library Mos6502 -component T6502 -version def //
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// ./tools/verilog/gen_tb -vendor opencores.org -library Mos6502 -component T6502 -version def //
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// //
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// //
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-->
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-->
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
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opencores.org
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opencores.org
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Mos6502
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Mos6502
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T6502
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T6502
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def_duth.design
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def_duth.design
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alu_status
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alu_status
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biu_wr_strobe
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biu_wr_strobe
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clk
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clk
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cts_pad_in
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cts_pad_in
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ext_addr
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ext_addr
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ext_cs
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ext_cs
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ext_irq_in
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ext_irq_in
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ext_lb
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ext_lb
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ext_rd
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ext_rd
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ext_rdata
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ext_rdata
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ext_stb
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ext_stb
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ext_ub
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ext_ub
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ext_wait
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ext_wait
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ext_wdata
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ext_wdata
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ext_wr
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ext_wr
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gpio_0_in
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gpio_0_in
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gpio_0_oe
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gpio_0_oe
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gpio_0_out
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gpio_0_out
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gpio_1_in
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gpio_1_in
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gpio_1_oe
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gpio_1_oe
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gpio_1_out
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gpio_1_out
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jsp_data_out
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jsp_data_out
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jtag_capture_dr
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jtag_capture_dr
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jtag_select
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jtag_select
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jtag_shift_dr
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jtag_shift_dr
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jtag_shiftcapture_dr_clk
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jtag_shiftcapture_dr_clk
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jtag_tdi
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jtag_tdi
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jtag_tdo
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jtag_tdo
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jtag_test_logic_reset
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jtag_test_logic_reset
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jtag_update_dr_clk
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jtag_update_dr_clk
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ps2_clk_pad_in
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ps2_clk_pad_in
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ps2_clk_pad_oe
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ps2_clk_pad_oe
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ps2_data_pad_in
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ps2_data_pad_in
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ps2_data_pad_oe
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ps2_data_pad_oe
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reset
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reset
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rts_pad_out
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rts_pad_out
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uart_rxd_pad_in
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uart_rxd_pad_in
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uart_txd_pad_out
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uart_txd_pad_out
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vga_blue_pad_out
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vga_blue_pad_out
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vga_green_pad_out
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vga_green_pad_out
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vga_hsync_n_pad_out
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vga_hsync_n_pad_out
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vga_red_pad_out
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vga_red_pad_out
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vga_vsync_n_pad_out
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vga_vsync_n_pad_out
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wb_jsp_dat_i
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wb_jsp_dat_i
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wb_jsp_stb_i
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wb_jsp_stb_i
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dut
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dut
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CPU_ADD
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CPU_ADD
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PROG_ROM_ADD
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PROG_ROM_ADD
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PROG_ROM_WORDS
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PROG_ROM_WORDS
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RAM_ADD
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RAM_ADD
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RAM_WORDS
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RAM_WORDS
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ROM_ADD
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ROM_ADD
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ROM_WORDS
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ROM_WORDS
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SPLIT_CH0_BITS
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SPLIT_CH0_BITS
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SPLIT_CH0_MATCH
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SPLIT_CH0_MATCH
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SPLIT_CH1_BITS
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SPLIT_CH1_BITS
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SPLIT_CH1_MATCH
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SPLIT_CH1_MATCH
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SPLIT_CH2_BITS
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SPLIT_CH2_BITS
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SPLIT_CH2_MATCH
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SPLIT_CH2_MATCH
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SPLIT_CH3_BITS
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SPLIT_CH3_BITS
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SPLIT_CH3_MATCH
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SPLIT_CH3_MATCH
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SPLIT_CH4_BITS
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SPLIT_CH4_BITS
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SPLIT_CH4_MATCH
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SPLIT_CH4_MATCH
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SPLIT_CH5_BITS
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SPLIT_CH5_BITS
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SPLIT_CH5_MATCH
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SPLIT_CH5_MATCH
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UART_DIV
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UART_DIV
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UART_PRESCALE
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UART_PRESCALE
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UART_PRE_SIZE
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UART_PRE_SIZE
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VEC_TABLE
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VEC_TABLE
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