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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [testbenches/] [xml/] [T6502_def_tb.xml] - Diff between revs 133 and 134

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Rev 133 Rev 134
Line 54... Line 54...
  none
  none
  common
  common
  ./tools/verilog/gen_verilog
  ./tools/verilog/gen_verilog
  
  
    
    
      configuration
 
      default
 
    
 
    
 
      destination
      destination
      tb.tb
      T6502_def_tb
    
 
    
 
      dest_dir
 
      ../verilog
 
    
 
    
 
      top
 
    
    
  
  
 
 
 
 
 
 
Line 202... Line 191...
 
 
 
 
 
 
      
      
        
        
        ../verilog/common/tb.tb
        ../verilog/common/T6502_def_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
   
   
 
 
Line 215... Line 204...
   
   
      fs-lint
      fs-lint
 
 
      
      
        
        
        ../verilog/common/tb.tb
        ../verilog/common/T6502_def_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
 
 

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