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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [cpu/] [rtl/] [xml/] [cpu_def.xml] - Diff between revs 131 and 133

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Rev 131 Rev 133
Line 123... Line 123... 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  elab_verilog
 
 
 
  102.1
 
 
 
  none
 
 
 
  :*Simulation:*
 
 
 
  ./tools/verilog/elab_verilog
 
 
 
    
 
 
    
 
 
      configuration
 
 
 
      default
 
 
 
    
 
 
    
 
 
      dest_dir
 
 
 
      io_ports
 
 
 
    
 
 
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  gen_verilog_sim
 
  gen_verilog_sim
 
  104.0
 
  104.0
 
  none
 
  none
 
  :*Simulation:*
 
  :*Simulation:*
Line 275... Line 306... 
 VEC_TABLE8'hff
 
 VEC_TABLE8'hff
 
 BOOT_VEC8'hfc
 
 BOOT_VEC8'hfc
 
 CPU_ADD16
 
 CPU_ADD16
 
 PROG_ROM_ADD0
 
 PROG_ROM_ADD0
 
 PROG_ROM_WORDS0
 
 PROG_ROM_WORDS0
 
 PROG_ROM_FILE"NONE"
 
 PROG_ROM_WIDTH16
 
 
 
 PROG_ROM_DEFAULT16'hffff
 
 
 
 
 
 
 
 
 
 
 
 STACK_RAM_SIZE8
 
 
 
 STACK_RAM_WORDS256
 
 
 
 STACK_RAM_WIDTH16
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

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