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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [cpu/] [sim/] [testbenches/] [xml/] [cpu_def_tb.xml] - Diff between revs 133 and 134

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Rev 133 Rev 134
Line 49... Line 49...
  none
  none
  common
  common
  ./tools/verilog/gen_verilog
  ./tools/verilog/gen_verilog
    
    
    
    
      configuration
 
      default
 
    
 
    
 
      destination
      destination
      tb.tb
      cpu_def_tb
    
 
    
 
      dest_dir
 
      ../verilog
 
    
 
    
 
      top
 
    
    
  
  
 
 
 
 
 
 
Line 207... Line 196...
 
 
 
 
 
 
      
      
        
        
        ../verilog/common/tb.tb
        ../verilog/common/cpu_def_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
 
 
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        ../verilog/common/tb.tb
        ../verilog/common/cpu_def_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
    
    

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