OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [adv_debug_sys/] [Hardware/] [adv_dbg_if/] [rtl/] [xml/] [adv_dbg_if_wb_cpu0_jfifo.xml] - Diff between revs 133 and 134

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 133 Rev 134
Line 48... Line 48... 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  elab_verilog
 
 
 
  102.1
 
 
 
  none
 
 
 
  :*Simulation:*
 
 
 
  ./tools/verilog/elab_verilog
 
 
 
    
 
 
    
 
 
      dest_dir
 
 
 
      io_ports
 
 
 
    
 
 
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Line 76... Line 63... 
    
    
    
    
      destination
 
      destination
 
      wb_cpu0_jfifo
 
      wb_cpu0_jfifo
 
    
    
    
 
 
      dest_dir
 
 
 
      ../verilog
 
 
 
    
 
 
  
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.