URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [componentCfg.xml] - Diff between revs 131 and 133

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Rev 131	Rev 133
Line 130...	Line 130...
`CLOCK_SRC0`	`CLOCK_SRC0`
`RESET_SENSE0`	`RESET_SENSE0`
`UART_PRESCALE5'b01100`	`UART_PRESCALE5'b01100`
`UART_PRE_SIZE5`	`UART_PRE_SIZE5`
`UART_DIV0`	`UART_DIV0`
`JTAG_SEL1`
`JTAG_USER1_WIDTH8`	`JTAG_USER1_WIDTH8`
`JTAG_USER1_RESET8'h12`	`JTAG_USER1_RESET8'h12`







	`core`

	`RAM_WORDS0`
	`RAM_ADD0`
	`ROM_WORDS0`
	`ROM_ADD0`
	`PROG_ROM_WORDS0`
	`PROG_ROM_ADD0`
	`VEC_TABLE0'h00`
	`UART_PRESCALE0'b00000`
	`UART_PRE_SIZE0`
	`UART_DIV0`
	`JTAG_USER1_WIDTH0`
	`JTAG_USER1_RESET0'h00`











`Nexys2_T6502/sim`	`Nexys2_T6502/sim`
Line 303...	Line 326...
`TIMEOUT800000`	`TIMEOUT800000`




	`jtag`
	`default`
	`Nexys2_T6502_default_tb`

	`ROM_FILE`
	`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
	`ROM_WORDS128`
	`ROM_ADD7`
	`PROG_ROM_FILE`
	`"opencores.org__Mos6502/sw/kim_2/kim_2.abs16"`
	`PROG_ROM_WORDS2048`
	`PROG_ROM_ADD11`
	`STARTUP`
	`"opencores.org__fpgas/sw/vga_startup_screen/vga_startup_screen.abs"`
	`FONT`
	`"opencores.org__fpgas/sw/vga_font/vga_font.abs"`
	`UART_MODEL_CLKCNT5'b11001`
	`UART_MODEL_SIZE5`
	`PERIOD20`
	`TIMEOUT800000`




`tim_2`	`tim_2`
`default`	`default`
`Nexys2_T6502_default_tb`	`Nexys2_T6502_default_tb`

`ROM_FILE`	`ROM_FILE`
Line 351...	Line 398...



`kim_2`	`kim_2`
`Nexys2_T6502_kim_2`	`Nexys2_T6502_kim_2`
`kim_2`
`default`	`default`

`ROM_FILE`	`ROM_FILE`
`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`	`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
`ROM_WORDS128`	`ROM_WORDS128`
Line 379...	Line 425...



`tim_2`	`tim_2`
`Nexys2_T6502_tim_2`	`Nexys2_T6502_tim_2`
`tim_2`
`default`	`default`

`ROM_FILE`	`ROM_FILE`
`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`	`"opencores.org__Mos6502/sw/table_tim1/table_tim1.abs16"`
`ROM_WORDS128`	`ROM_WORDS128`
Line 409...	Line 454...









	`Nexys2_T6502_kim_2`
	`kim_2`
	`default`



	`ise`


	`digilentinc.com`
	`Nexys2`
	`fpga`
	`xc3s1200e-fg320-5`






	`Nexys2_T6502_tim_2`
	`tim_2`
	`default`



	`ise`


	`digilentinc.com`
	`Nexys2`
	`fpga`
	`xc3s1200e-fg320-5`

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [componentCfg.xml] - Diff between revs 131 and 133