URL
https://opencores.org/ocsvn/socgen/socgen/trunk
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// Generated File Do Not EDIT //
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// Generated File Do Not EDIT //
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// //
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// //
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// ./tools/verilog/gen_tb -vendor opencores.org -library io -component io_ps2 -version mouse //
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// ./tools/verilog/gen_tb -vendor opencores.org -library io -component io_ps2 -version mouse //
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// //
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// //
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-->
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-->
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
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opencores.org
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opencores.org
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io
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io
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io_ps2
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io_ps2
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mouse_duth.design
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mouse_duth.design
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addr
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addr
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clk
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clk
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cs
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cs
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enable
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enable
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ms_left
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ms_left
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ms_mid
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ms_mid
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ms_right
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ms_right
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new_packet
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new_packet
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ps2_clk_pad_in
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ps2_clk_pad_in
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ps2_clk_pad_oe
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ps2_clk_pad_oe
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ps2_data_pad_in
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ps2_data_pad_in
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ps2_data_pad_oe
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ps2_data_pad_oe
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rcv_data_avail
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rcv_data_avail
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rd
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rd
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rdata
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rdata
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reset
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reset
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wdata
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wdata
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wr
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wr
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x_pos
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x_pos
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y_pos
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y_pos
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dut
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dut
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