URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [disp_io/] [rtl/] [xml/] [disp_io_jtag.xml] - Diff between revs 133 and 134

Rev 133	Rev 134
Line 1...	Line 1...


`// //`	`// //`
`// Author : John Eaton Ouabache Designworks //`	`// Author : John Eaton Ouabache Designworks //`
`// //`	`// //`
`// Copyright (C) 2010 Authors and OPENCORES.ORG //`	`// Copyright (C) 2010 Authors and OPENCORES.ORG //`
Line 75...	Line 75...






`elab_verilog`
`102.1`
`none`
`:Simulation:`
`./tools/verilog/elab_verilog`


`dest_dir`
`io_ports`








`gen_verilog`	`gen_verilog`
`104.0`	`104.0`
`none`	`none`
`common`	`common`
`./tools/verilog/gen_verilog`	`./tools/verilog/gen_verilog`


`destination`	`destination`
`jtag.top`	`disp_io_jtag`


`dest_dir`
`../verilog`













`fs-common`



`../verilog/top.jtag`
`verilogSourcefragment`






`fs-sim`



`../verilog/copyright.v`
`verilogSourceinclude`




`../verilog/common/jtag.top`
`verilogSourcemodule`









`fs-syn`



`../verilog/copyright.v`
`verilogSourceinclude`




`../verilog/common/jtag.top`
`verilogSourcemodule`















Line 330...	Line 251...









	`fs-common`



	`../verilog/top.jtag`
	`verilogSourcefragment`






	`fs-sim`



	`../verilog/copyright`
	`verilogSourceinclude`




	`../verilog/common/disp_io_jtag`
	`verilogSourcemodule`









	`fs-syn`



	`../verilog/copyright`
	`verilogSourceinclude`




	`../verilog/common/disp_io_jtag`
	`verilogSourcemodule`