| Line 1... |
Line 1... |
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assign enable = ~( ext_mem_wait || io_reg_wait );
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/* CH0 */
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reg mem_cs_r;
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reg mem_cs_r;
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always@(*)
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always@(addr_in)
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begin
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begin
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if(addr_in[15:8] == 8'h00) mem_cs = 1'b1;
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if(addr_in[ADD-1:ADD-CH0_BITS] == CH0_MATCH) mem_cs = 1'b1;
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else mem_cs = 1'b0;
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else mem_cs = 1'b0;
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end
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end
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always@(posedge clk)
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always@(posedge clk)
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| Line 17... |
Line 25... |
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assign mem_addr = addr_in;
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assign mem_addr = addr_in;
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assign mem_rd = rd_in;
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assign mem_rd = rd_in;
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assign mem_wr = wr_in;
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assign mem_wr = wr_in;
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assign mem_wdata = {wdata_in,wdata_in};
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assign mem_wdata = {wdata_in,wdata_in};
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assign enable = ~( ext_mem_wait || io_reg_wait );
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/* CH1 */
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reg data_cs_r;
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reg data_cs_r;
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always@(*)
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always@(addr_in)
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begin
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begin
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if(addr_in[15:12] == 4'b0000) data_cs = 1'b1;
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if(addr_in[ADD-1:ADD-CH1_BITS] == CH1_MATCH) data_cs = 1'b1;
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else data_cs = 1'b0;
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else data_cs = 1'b0;
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end
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end
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always@(posedge clk)
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always@(posedge clk)
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begin
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begin
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data_cs_r <= data_cs;
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data_cs_r <= data_cs;
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end
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end
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assign data_addr = addr_in[11:1];
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assign data_addr = addr_in[ADD-CH1_BITS-1:1];
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assign data_rd = rd_in;
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assign data_rd = rd_in;
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assign data_wr = wr_in;
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assign data_wr = wr_in;
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assign data_wdata = {wdata_in,wdata_in};
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assign data_wdata = {wdata_in,wdata_in};
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assign data_be[0] = !addr_in[0];
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assign data_be[0] = !addr_in[0];
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assign data_be[1] = addr_in[0];
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assign data_be[1] = addr_in[0];
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/* CH2 */
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reg io_reg_cs_r;
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reg io_reg_cs_r;
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always@(*)
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always@(addr_in)
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begin
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begin
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if(addr_in[15:8] == 8'b10000000) io_reg_cs = 1'b1;
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if(addr_in[ADD-1:ADD-CH2_BITS] == CH2_MATCH) io_reg_cs = 1'b1;
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else io_reg_cs = 1'b0;
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else io_reg_cs = 1'b0;
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end
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end
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always@(posedge clk)
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always@(posedge clk)
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begin
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begin
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io_reg_cs_r <= io_reg_cs;
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io_reg_cs_r <= io_reg_cs;
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end
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end
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assign io_reg_addr = addr_in[7:0];
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assign io_reg_addr = addr_in[ADD-CH2_BITS-1:0];
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assign io_reg_rd = rd_in;
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assign io_reg_rd = rd_in;
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assign io_reg_wr = wr_in;
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assign io_reg_wr = wr_in;
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assign io_reg_wdata = wdata_in;
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assign io_reg_wdata = wdata_in;
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/* CH3 */
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reg ext_mem_cs_r;
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reg ext_mem_cs_r;
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always@(*)
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always@(addr_in)
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begin
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begin
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if(addr_in[15:14] == 2'b01) ext_mem_cs = 1'b1;
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if(addr_in[ADD-1:ADD-CH3_BITS] == CH3_MATCH) ext_mem_cs = 1'b1;
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else ext_mem_cs = 1'b0;
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else ext_mem_cs = 1'b0;
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end
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end
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always@(posedge clk)
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always@(posedge clk)
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begin
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begin
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ext_mem_cs_r <= ext_mem_cs;
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ext_mem_cs_r <= ext_mem_cs;
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end
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end
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assign ext_mem_addr = addr_in[ADD-CH3_BITS-1:0];
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assign ext_mem_addr = addr_in[13:0];
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assign ext_mem_rd = rd_in;
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assign ext_mem_rd = rd_in;
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assign ext_mem_wr = wr_in;
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assign ext_mem_wr = wr_in;
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assign ext_mem_wdata = {wdata_in,wdata_in};
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assign ext_mem_wdata = {wdata_in,wdata_in};
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/* CH4 */
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reg prog_rom_mem_cs_r;
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reg prog_rom_mem_cs_r;
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always@(*)
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always@(addr_in)
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begin
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begin
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if(addr_in[15:12] == 4'b1100) prog_rom_mem_cs = 1'b1;
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if(addr_in[ADD-1:ADD-CH4_BITS] == CH4_MATCH) prog_rom_mem_cs = 1'b1;
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else prog_rom_mem_cs = 1'b0;
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else prog_rom_mem_cs = 1'b0;
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end
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end
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always@(posedge clk)
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always@(posedge clk)
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begin
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begin
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prog_rom_mem_cs_r <= prog_rom_mem_cs;
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prog_rom_mem_cs_r <= prog_rom_mem_cs;
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end
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end
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assign prog_rom_mem_addr = addr_in[ADD-CH4_BITS-1:0];
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assign prog_rom_mem_addr = addr_in[11:0];
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assign prog_rom_mem_rd = rd_in;
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assign prog_rom_mem_rd = rd_in;
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assign prog_rom_mem_wr = wr_in;
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assign prog_rom_mem_wr = wr_in;
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assign prog_rom_mem_wdata = {wdata_in,wdata_in};
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assign prog_rom_mem_wdata = {wdata_in,wdata_in};
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/* CH5 */
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reg sh_prog_rom_mem_cs_r;
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reg sh_prog_rom_mem_cs_r;
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always@(addr_in)
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always@(*)
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begin
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begin
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if(addr_in[15:12] == 4'b1111) sh_prog_rom_mem_cs = 1'b1;
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if(addr_in[ADD-1:ADD-CH5_BITS] == CH5_MATCH) sh_prog_rom_mem_cs = 1'b1;
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else sh_prog_rom_mem_cs = 1'b0;
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else sh_prog_rom_mem_cs = 1'b0;
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end
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end
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always@(posedge clk)
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always@(posedge clk)
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begin
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begin
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sh_prog_rom_mem_cs_r <= sh_prog_rom_mem_cs;
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sh_prog_rom_mem_cs_r <= sh_prog_rom_mem_cs;
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end
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end
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assign sh_prog_rom_mem_addr = addr_in[11:0];
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assign sh_prog_rom_mem_addr = addr_in[ADD-CH5_BITS-1:0];
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assign sh_prog_rom_mem_rd = rd_in;
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assign sh_prog_rom_mem_rd = rd_in;
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assign sh_prog_rom_mem_wr = wr_in;
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assign sh_prog_rom_mem_wr = wr_in;
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assign sh_prog_rom_mem_wdata = {wdata_in,wdata_in};
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assign sh_prog_rom_mem_wdata = {wdata_in,wdata_in};
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