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https://opencores.org/ocsvn/socgen/socgen/trunk
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// You should have received a copy of the GNU Lesser General //
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// You should have received a copy of the GNU Lesser General //
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// Public License along with this source; if not, download it //
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// Public License along with this source; if not, download it //
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// from http://www.opencores.org/lgpl.shtml //
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// from http://www.opencores.org/lgpl.shtml //
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// //
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// //
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-->
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-->
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
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opencores.org
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opencores.org
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logic
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logic
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ps2_interface
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ps2_interface
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def.design
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def.design
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usec_prescale_count
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usec_prescale_count
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reg
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reg
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70
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70
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usec_delay_count
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usec_delay_count
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reg
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reg
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60
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60
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usec_delay_done
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usec_delay_done
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reg
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reg
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usec_tick
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usec_tick
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reg
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reg
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force_startbit
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force_startbit
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reg
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reg
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sending
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sending
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reg
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reg
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frame
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frame
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reg
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reg
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100
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100
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bit_count
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bit_count
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reg
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reg
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30
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30
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enable_usec_delay
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enable_usec_delay
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wire
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wire
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start_xmit
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start_xmit
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wire
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wire
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ps2_clk_s
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ps2_clk_s
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wire
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wire
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ps2_clk_rise
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ps2_clk_rise
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wire
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wire
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ps2_clk_fall
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ps2_clk_fall
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wire
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wire
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ps2_data_s
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ps2_data_s
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wire
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wire
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shift_frame
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shift_frame
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wire
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wire
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load_tx_data
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load_tx_data
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wire
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wire
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x_shift_buffer
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x_shift_buffer
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wire
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wire
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70
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70
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x_stop_cnt
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x_stop_cnt
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wire
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wire
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x_last_cnt
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x_last_cnt
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wire
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wire
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x_parity_calc
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x_parity_calc
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wire
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wire
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x_parity_samp
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x_parity_samp
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wire
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wire
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x_frame_err
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x_frame_err
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wire
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wire
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cde_serial_xmit_edge_enable
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cde_serial_xmit_edge_enable
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wire
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wire
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cde_serial_xmit_load
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cde_serial_xmit_load
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wire
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wire
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cde_serial_rcvr_reset
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cde_serial_rcvr_reset
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wire
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wire
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clk
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clk
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reset
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reset
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ps2_clk_pad_in
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ps2_clk_pad_in
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ps2_data_pad_in
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ps2_data_pad_in
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ps2_clk_s
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ps2_clk_s
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ps2_clk_rise
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ps2_clk_rise
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ps2_clk_fall
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ps2_clk_fall
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ps2_data_s
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ps2_data_s
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cde_serial_xmit_edge_enable
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cde_serial_xmit_edge_enable
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cde_serial_xmit_load
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cde_serial_xmit_load
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~tx_data
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~tx_data
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tx_buffer_empty
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tx_buffer_empty
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ps2_data_pad_oe
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ps2_data_pad_oe
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cde_serial_rcvr_reset
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cde_serial_rcvr_reset
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ps2_clk_fall
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ps2_clk_fall
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ps2_data_s
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ps2_data_s
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x_shift_buffer
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x_shift_buffer
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x_stop_cnt
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x_stop_cnt
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x_last_cnt
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x_last_cnt
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x_parity_calc
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x_parity_calc
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x_parity_samp
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x_parity_samp
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x_frame_err
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x_frame_err
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clk_filter
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clk_filter
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DEBOUNCE_DELAY
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DEBOUNCE_DELAY
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data_filter
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data_filter
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DEBOUNCE_DELAY
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DEBOUNCE_DELAY
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cde_serial_xmit
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cde_serial_xmit
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cde_serial_rcvr
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cde_serial_rcvr
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