URL
https://opencores.org/ocsvn/socgen/socgen/trunk
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// //
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// //
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// //
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// //
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// //
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// //
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// //
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// //
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-->
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-->
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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
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xmlns:socgen="http://opencores.org"
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xmlns:socgen="http://opencores.org"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
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xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
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xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
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http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
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http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
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opencores.org
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opencores.org
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logic
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logic
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uart
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uart
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tx_dut.params
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tx_dut.params
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Dut
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Dut
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spirit:library="logic"
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ipxact:library="logic"
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spirit:name="uart"
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ipxact:name="uart"
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spirit:version="tx_duth.design"/>
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ipxact:version="tx_duth.design"/>
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PRESCALE5'b01100
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PRESCALE5'b01100
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PRE_SIZE5
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PRE_SIZE5
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SIZE8
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SIZE8
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DIV0
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DIV0
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DIV_SIZE4
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DIV_SIZE4
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TX_FIFO_SIZE3
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TX_FIFO_SIZE3
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TX_FIFO_WORDS8
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TX_FIFO_WORDS8
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