OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [sim/] [testbenches/] [xml/] [cde_serial_both_tb.xml] - Diff between revs 131 and 134

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 131 Rev 134
Line 28... Line 28...
  common
  common
  ./tools/verilog/gen_verilog
  ./tools/verilog/gen_verilog
  
  
    
    
      destination
      destination
      both.tb
      serial_both_tb
    
 
    
 
      dest_dir
 
      ../verilog
 
    
 
    
 
      top
 
    
    
  
  
 
 
 
 
 
 
Line 153... Line 146...
 
 
 
 
 
 
      
      
        
        
        ../verilog/common/both.tb
        ../verilog/common/serial_both_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
   
   
Line 166... Line 159...
   
   
      fs-lint
      fs-lint
 
 
      
      
        
        
        ../verilog/common/both.tb
        ../verilog/common/serial_both_tb
        verilogSourcemodule
        verilogSourcemodule
      
      
 
 
 
 
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.