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Rev 131 Rev 134
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<P>The synchronous ram modules provide a variety of memory storage
<P>The synchronous ram modules provide a variety of memory storage
options. <BR>Both reads and writes are synchronous to the rising edge
options. <BR>Both reads and writes are synchronous to the rising edge
of clk. <BR>Memory may be initialized from a bit file and later
of clk. <BR>Memory may be initialized from a bit file and later
overwritten by memory writes. <BR>If WRITETHRU is set to 1 then a
overwritten by memory writes. <BR>If WRITETHRU is set to 1 then a
simultaneous read/write to the same address will read the new data.
simultaneous read/write to the same address will read the new data.
<BR>If set to 0 it will return the old. <BR>Setting DEFAULT
<BR>If set to 0 it will return the old. <BR><BR><BR><BR><BR><IMG SRC="../png/sram_timing.png" NAME="graphics1" ALIGN=BOTTOM WIDTH=724 HEIGHT=544 BORDER=0><BR><B><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR></B><BR><BR>
determines the value of rdata when a read is not
 
occurring<BR><BR><BR><BR><IMG SRC="../png/sram_timing.png" NAME="graphics1" ALIGN=BOTTOM WIDTH=724 HEIGHT=544 BORDER=0><BR><B><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR><BR></B><BR><BR>
 
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