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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [sram/] [rtl/] [verilog/] [lint/] [sram_word.v] - Diff between revs 131 and 134

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Rev 131	Rev 134
Line 21...	Line 21...
`module`	`module`
`cde_sram_word`	`cde_sram_word`
`#( parameter`	`#( parameter`
`ADDR=10,`	`ADDR=10,`
`WORDS=1024,`	`WORDS=1024,`
`WRITETHRU=0,`	`WRITETHRU=0`
`DEFAULT={16'hffff},`	`)`
`INIT_FILE="NONE")`
`(`	`(`
`input wire clk,`	`input wire clk,`
`input wire cs,`	`input wire cs,`
`input wire rd,`	`input wire rd,`
`input wire wr,`	`input wire wr,`
Line 36...	Line 35...
`input wire [ 1 : 0] be,`	`input wire [ 1 : 0] be,`
`output reg [ 15 : 0] rdata);`	`output reg [ 15 : 0] rdata);`

`always@(posedge clk)`	`always@(posedge clk)`
`if( rd && cs ) rdata <= wdata ;`	`if( rd && cs ) rdata <= wdata ;`
`else rdata <= DEFAULT;`	`else rdata <= 16'hffff;`


`endmodule`	`endmodule`

`No newline at end of file`	`No newline at end of file`

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