URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [sync/] [rtl/] [xml/] [cde_sync_with_hysteresis.xml] - Diff between revs 131 and 134

Rev 131	Rev 134
Line 15...	Line 15...
`with_hysteresis default`	`with_hysteresis default`










	`gen_verilog`
	`104.0`
	`none`
	`common`
	`./tools/verilog/gen_verilog`


	`destination`
	`sync_with_hysteresis`


















	`verilog`


	`spirit:library="Testbench"`
	`spirit:name="toolflow"`
	`spirit:version="verilog"/>`






	`commoncommon`
	`Verilog`


	`fs-common`






`sim:Simulation:`	`sim:Simulation:`
`Verilog`	`Verilog`

Line 39...	Line 89...
`fs-syn`	`fs-syn`






`doc`	`doc`


`spirit:library="Testbench"`	`spirit:library="Testbench"`
Line 112...	Line 161...







	`fs-common`



	`../verilog/sync_with_hysteresis`
	`verilogSourcefragment`










`fs-sim`	`fs-sim`



	`../verilog/copyright`
	`verilogSourceinclude`





	`../verilog/common/sync_with_hysteresis`
	`verilogSourcemodule`




`dest_dir`	`dest_dir`
`../verilog/`	`../views/sim/`
`verilogSourcelibraryDir`	`verilogSourcelibraryDir`






`fs-syn`	`fs-syn`




	`../verilog/copyright`
	`verilogSourceinclude`





	`../verilog/common/sync_with_hysteresis`
	`verilogSourcemodule`



`dest_dir`	`dest_dir`
`../verilog/`	`../views/syn/`
`verilogSourcelibraryDir`	`verilogSourcelibraryDir`








`fs-lint`	`fs-lint`


`dest_dir`	`dest_dir`
`../verilog/`	`../views/syn/`
`verilogSourcelibraryDir`	`verilogSourcelibraryDir`