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[/] [socgen/] [trunk/] [tools/] [simulation/] [build_verilator_filelists] - Diff between revs 130 and 131

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Rev 130 Rev 131
Line 66... Line 66...
############################################################################
############################################################################
Getopt::Long::config("require_order", "prefix=-");
Getopt::Long::config("require_order", "prefix=-");
GetOptions("h","help",
GetOptions("h","help",
           "work_site=s" => \$work_site,
           "work_site=s" => \$work_site,
           "vendor=s" => \$vendor,
           "vendor=s" => \$vendor,
           "project=s" => \$project,
           "library=s" => \$library,
           "component=s" => \$component,
           "component=s" => \$component,
           "version=s" => \$version
           "version=s" => \$version
) || die "(use '$program_name -h' for help)";
) || die "(use '$program_name -h' for help)";
 
 
 
 
 
 
##############################################################################
##############################################################################
## Help option
## Help option
##############################################################################
##############################################################################
if ( $opt_h  or $opt_help)
if ( $opt_h  or $opt_help)
  { print "\n build_sim_filelists -work_site /work  -vendor vendor_name  -project project_name  -component component_name   ";
  { print "\n build_verilator_filelists -work_site /work  -vendor vendor_name  -library library_name  -component component_name   ";
    print "\n";
    print "\n";
    exit 1;
    exit 1;
  }
  }
 
 
 
 
Line 115... Line 115...
#############################################################################
#############################################################################
##
##
##
##
#############################################################################
#############################################################################
 
 
print "Building SIM filelists for  $work_site  $vendor $project   $component $version $variant \n" ;
print "Building SIM filelists for  $work_site  $vendor $library   $component $version $variant \n" ;
 
 
my $spirit_component_file    = $parser->parse_file(yp::lib::find_ipxact_component($vendor,$project,$component,$version));
my $spirit_component_file    = $parser->parse_file(yp::lib::find_ipxact_component($vendor,$library,$component,$version));
my $socgen_file              = $parser->parse_file(yp::lib::find_componentConfiguration($vendor,$project,$component));
my $socgen_file              = $parser->parse_file(yp::lib::find_componentConfiguration($vendor,$library,$component));
my $sim_library_path ;
my $sim_library_path ;
my $lib_comp_sep             = yp::lib::find_lib_comp_sep($vendor,$project,$component);
my $lib_comp_sep             = yp::lib::find_lib_comp_sep($vendor,$library,$component);
my $sim_comp_path            = $socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:comp_path/text()")->to_literal;
my $sim_comp_path            = $socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:comp_path/text()")->to_literal;
 
 
   if ($sim_comp_path)
   if ($sim_comp_path)
      {
      {
      $sim_library_path            ="${lib_comp_sep}${sim_comp_path}";
      $sim_library_path            ="${lib_comp_sep}${sim_comp_path}";
Line 173... Line 173...
   my($name)     = $comp->findnodes('./spirit:name/text()')->to_literal ;
   my($name)     = $comp->findnodes('./spirit:name/text()')->to_literal ;
   my($version)  = $comp->findnodes('./spirit:version/text()')->to_literal ;
   my($version)  = $comp->findnodes('./spirit:version/text()')->to_literal ;
   my $variant = "";
   my $variant = "";
   if($version) {$variant = "${name}_${version}"}
   if($version) {$variant = "${name}_${version}"}
   else         {$variant = "${name}"}
   else         {$variant = "${name}"}
   print "rtl/gen directories  for    $project - $component         VLNV        $vendor - $library -  $name -  $variant \n";
   print "rtl/gen directories  for    $library - $component         VLNV        $vendor - $library -  $name -  $variant \n";
   }
   }
 
 
   print "CREATING componentRef filelists for   $project   $component  $name $variant \n";
   print "CREATING componentRef filelists for   $library   $component  $name $variant \n";
 
 
 
 
   #/*********************************************************************************************/
   #/*********************************************************************************************/
   #/                                                                                            */
   #/                                                                                            */
   #/                                                                                            */
   #/                                                                                            */
Line 192... Line 192...
 
 
 
 
foreach  my   $i_name ($socgen_file->findnodes("//socgen:testbench[socgen:variant/text() = '$variant']/socgen:code_coverage"))
foreach  my   $i_name ($socgen_file->findnodes("//socgen:testbench[socgen:variant/text() = '$variant']/socgen:code_coverage"))
   {
   {
 
 
   my $path ="${home}${work_site}/${vendor}__${project}${sim_library_path}/cov";
   my $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov";
   mkdir $path,0755          unless( -e $path );
   mkdir $path,0755          unless( -e $path );
   $path ="${home}${work_site}/${vendor}__${project}${sim_library_path}/cov/${variant}";
   $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov/${variant}";
   mkdir $path,0755          unless( -e $path );
   mkdir $path,0755          unless( -e $path );
 
 
 
 
   my $outfile ="${home}${work_site}/${vendor}__${project}${sim_library_path}/cov/${variant}/TestBench";
   my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov/${variant}/TestBench";
   open  DUTFILE,">$outfile" or die "unable to open $outfile";
   open  DUTFILE,">$outfile" or die "unable to open $outfile";
   print  DUTFILE  "`timescale    1ns/1ns   \n";
   print  DUTFILE  "`timescale    1ns/1ns   \n";
   print  DUTFILE  " module TB();   \n";
   print  DUTFILE  " module TB();   \n";
 
 
 
 
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   #/                                                                                            */
   #/                                                                                            */
   #/                                                                                            */
   #/                                                                                            */
   #/                                                                                            */
   #/                                                                                            */
   #/*********************************************************************************************/
   #/*********************************************************************************************/
 
 
   print "CREATING sim files for   $project  $component   $chip   $name  $variant \n";
   print "CREATING sim files for   $library  $component   $chip   $name  $variant \n";
 
 
 
 
 
 
 
 
 
 
 
 
    foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:verilator/socgen:test[socgen:variant/text() = '$variant']"))
    foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:verilator/socgen:test[socgen:variant/text() = '$variant']"))
      {
      {
      my($simulation)      = $i_name ->findnodes('socgen:name/text()')->to_literal ;
      my($simulation)      = $i_name ->findnodes('socgen:name/text()')->to_literal ;
      my($configuration)   = $i_name ->findnodes('socgen:configuration/text()')->to_literal ;
      my($configuration)   = $i_name ->findnodes('socgen:configuration/text()')->to_literal ;
      print " sim files for   $project  $component   $variant  $simulation $configuration          \n";
      print " sim files for   $library  $component   $variant  $simulation $configuration          \n";
 
 
      my $path ="${home}${work_site}/${vendor}__${project}${sim_library_path}/verilator";
      my $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator";
      mkdir $path,0755          unless( -e $path );
      mkdir $path,0755          unless( -e $path );
      $path ="${home}${work_site}/${vendor}__${project}${sim_library_path}/verilator/${simulation}";
      $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator/${simulation}";
      mkdir $path,0755          unless( -e $path );
      mkdir $path,0755          unless( -e $path );
 
 
      my $outfile ="${home}${work_site}/${vendor}__${project}${sim_library_path}/verilator/${simulation}/Makefile";
      my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator/${simulation}/Makefile";
      open  MAKSIMFILE,">$outfile" or die "unable to open $outfile";
      open  MAKSIMFILE,">$outfile" or die "unable to open $outfile";
 
 
 
 
      my $outfile ="${home}${work_site}/${vendor}__${project}${sim_library_path}/verilator/${simulation}/TestBench";
      my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator/${simulation}/TestBench";
      open SIM_PARM_FILE,">$outfile" or die "unable to open $outfile";
      open SIM_PARM_FILE,">$outfile" or die "unable to open $outfile";
 
 
 
 
 
 
 
 
Line 348... Line 348...
      print MAKSIMFILE  "simulator=verilator\n";
      print MAKSIMFILE  "simulator=verilator\n";
 
 
 
 
 
 
 
 
      my $module_name = yp::lib::get_module_name($vendor,$project,$component,$version);
      my $module_name = yp::lib::get_module_name($vendor,$library,$component,$version);
 
 
 
 
 
 
 
 
      print SIM_PARM_FILE  "//  Testbench  for  $project    $component    $variant   $configuration    $simulation\n";
      print SIM_PARM_FILE  "//  Testbench  for  $library    $component    $variant   $configuration    $simulation\n";
      print SIM_PARM_FILE  "                \n";
      print SIM_PARM_FILE  "                \n";
      print SIM_PARM_FILE  "module TB(input clk, input START,     output FINISH,output FAIL                 );                                \n";
      print SIM_PARM_FILE  "module TB(input clk, input START,     output FINISH,output FAIL                 );                                \n";
      print SIM_PARM_FILE  "                                \n";
      print SIM_PARM_FILE  "                                \n";
      print SIM_PARM_FILE  "     $module_name   \n";
      print SIM_PARM_FILE  "     $module_name   \n";
 
 

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