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[/] [socgen/] [trunk/] [tools/] [synthesys/] [run_ise] - Diff between revs 131 and 135

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Rev 131 Rev 135
Line 1... Line 1...
eval 'exec `which perl` -S $0 ${1+"$@"}'
eval 'exec `which perl` -S $0 ${1+"$@"}'
   if 0;
   if 0;
 
#/****************************************************************************/
#/**********************************************************************/
 
#/*                                                                    */
 
#/*             -------                                                */
 
#/*            /   SOC  \                                              */
 
#/*           /    GEN   \                                             */
 
#/*          /    TOOL    \                                            */
 
#/*          ==============                                            */
 
#/*          |            |                                            */
 
#/*          |____________|                                            */
 
#/*                                                                    */
#/*                                                                    */
 
#/*   SOCGEN Design for Reuse toolset                                        */
#/*                                                                    */
#/*                                                                    */
 
#/*   Version 1.0.0                                                          */
#/*                                                                    */
#/*                                                                    */
#/*  Author(s):                                                        */
#/*  Author(s):                                                        */
#/*      - John Eaton, jt_eaton@opencores.org                          */
#/*      - John Eaton, z3qmtr45@gmail.com                                    */
#/*                                                                    */
#/*                                                                    */
#/**********************************************************************/
#/****************************************************************************/
#/*                                                                    */
#/*                                                                    */
#/*    Copyright (C) <2010-2011>                */
 
#/*                                                                    */
#/*                                                                    */
#/*  This source file may be used and distributed without              */
#/*             Copyright 2016 John T Eaton                                  */
#/*  restriction provided that this copyright statement is not         */
 
#/*  removed from the file and that any derivative work contains       */
 
#/*  the original copyright notice and the associated disclaimer.      */
 
#/*                                                                    */
 
#/*  This source file is free software; you can redistribute it        */
 
#/*  and/or modify it under the terms of the GNU Lesser General        */
 
#/*  Public License as published by the Free Software Foundation;      */
 
#/*  either version 2.1 of the License, or (at your option) any        */
 
#/*  later version.                                                    */
 
#/*                                                                    */
 
#/*  This source is distributed in the hope that it will be            */
 
#/*  useful, but WITHOUT ANY WARRANTY; without even the implied        */
 
#/*  warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR           */
 
#/*  PURPOSE.  See the GNU Lesser General Public License for more      */
 
#/*  details.                                                          */
 
#/*                                                                    */
 
#/*  You should have received a copy of the GNU Lesser General         */
 
#/*  Public License along with this source; if not, download it        */
 
#/*  from http://www.opencores.org/lgpl.shtml                          */
 
#/*                                                                    */
#/*                                                                    */
#/**********************************************************************/
#/* Licensed under the Apache License, Version 2.0 (the "License");          */
 
#/* you may not use this file except in compliance with the License.         */
 
#/* You may obtain a copy of the License at                                  */
 
#/*                                                                          */
 
#/*    http://www.apache.org/licenses/LICENSE-2.0                            */
 
#/*                                                                          */
 
#/* Unless required by applicable law or agreed to in writing, software      */
 
#/* distributed under the License is distributed on an "AS IS" BASIS,        */
 
#/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. */
 
#/* See the License for the specific language governing permissions and      */
 
#/* limitations under the License.                                           */
 
#/*                                                                          */
 
#/*                                                                          */
 
#/****************************************************************************/
 
 
 
 
############################################################################
############################################################################
# General PERL config
# General PERL config
############################################################################
############################################################################
Line 95... Line 81...
my $vendor           = $ARGV[0];
my $vendor           = $ARGV[0];
my $library          = $ARGV[1];
my $library          = $ARGV[1];
my $syn_library_path = $ARGV[2];
my $syn_library_path = $ARGV[2];
my $chip_name        = $ARGV[3];
my $chip_name        = $ARGV[3];
my $chip_part        = $ARGV[4];
my $chip_part        = $ARGV[4];
 
my $chip_tool        = $ARGV[5];
 
 
chdir  "./${prefix}/${vendor}__${library}${syn_library_path}/ise/${chip_name}";
 
 
print "CHANGING TO === ${prefix}/${vendor}__${library}${syn_library_path}/${chip_tool}/${chip_name} \n";
 
chdir  "./${prefix}/${vendor}__${library}${syn_library_path}/${chip_tool}/${chip_name}";
 
 
$cmd ="echo \"run -ifn ./filelists/${chip_name}.ISE -ifmt mixed -top $chip_name  -ofn  ${chip_name}.ngc -ofmt NGC  -p $chip_part -opt_mode Speed -opt_level 1 \" > Yst;   \n";
$cmd ="echo \"run -ifn ./filelists/${chip_name}.ISE -ifmt mixed -top $chip_name  -ofn  ${chip_name}.ngc -ofmt NGC  -p $chip_part -opt_mode Speed -opt_level 1 \" > Yst;   \n";
if (system($cmd)) {}
if (system($cmd)) {}
 
 
 
$cmd = "xst -ifn ./Yst -ofn ${chip_name}.log\n";
 
if (system($cmd)) {}
 
 
 
$cmd ="ngdbuild -dd _ngo -nt timestamp -p ${chip_part}  -uc ./target/Pad_Ring.ucf ${chip_name}   >>${chip_name}.log \n";
 
if (system($cmd)) {}
 
 
 
 
 
$cmd ="map  -p  ${chip_part}   -ir off -pr off  -c 100 -o ${chip_name}_map.ncd ${chip_name}.ngd ${chip_name}.pcf >>${chip_name}.log\n";
 
if (system($cmd)) {}
 
 
 
$cmd ="par -w  -ol std  ${chip_name}_map.ncd ${chip_name}.ncd ${chip_name}.pcf  >>${chip_name}.log\n";
 
if (system($cmd)) {}
 
 
 
 
$cmd ="make xst \n";
$cmd ="trce -e 3  -xml ${chip_name} ${chip_name}.ncd -o ${chip_name}.twr ${chip_name}.pcf -ucf ../target/Pad_Ring.ucf >>${chip_name}.log\n";
if (system($cmd)) {}
if (system($cmd)) {}
 
 
 
 
$cmd ="make fpga \n";
$cmd ="netgen    -pcf  ${chip_name}.pcf  -sdf_anno true -sdf_path \"./gate_sims/par\" -insert_glbl true -insert_pp_buffers true -w -dir ./gate_sims/par  -ofmt verilog -sim  ${chip_name}.ncd   ${chip_name}.v >>${chip_name}.log \n";
 
 
if (system($cmd)) {}
if (system($cmd)) {}
 
 
 
 
$cmd ="make bitgen \n";
$cmd  ="bitgen -f ./target/cclk.ut  ${chip_name}.ncd >>${chip_name}.log \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="mv ${chip_name}.bit Board_Design_cclk.bit \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="promgen -w -u 0 Board_Design_cclk >>${chip_name}.log \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="mv Board_Design_cclk.mcs ./debug \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="bitgen -f ./target/jtag.ut  ${chip_name}.ncd  >>${chip_name}.log  \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="mv ${chip_name}.bit Board_Design_jtag.bit \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="impact -batch ./debug/impact_bat  >>${chip_name}.log  \n";
 
if (system($cmd)) {}
 
 
 
$cmd ="mv *.bit ./debug \n";
if (system($cmd)) {}
if (system($cmd)) {}
 
 
 
 
chdir  "$home";
chdir  "$home";
 
 

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