| Line 53... |
Line 53... |
use Cwd;
|
use Cwd;
|
use XML::LibXML;
|
use XML::LibXML;
|
use lib './tools';
|
use lib './tools';
|
use sys::lib;
|
use sys::lib;
|
use yp::lib;
|
use yp::lib;
|
|
use BerkeleyDB;
|
use Parallel::ForkManager;
|
use Parallel::ForkManager;
|
|
|
$OUTPUT_AUTOFLUSH = 1; # set autoflush of stdout to TRUE.
|
$OUTPUT_AUTOFLUSH = 1; # set autoflush of stdout to TRUE.
|
|
|
|
|
| Line 95... |
Line 96... |
#/**********************************************************************/
|
#/**********************************************************************/
|
|
|
my @elab_cmds = ();
|
my @elab_cmds = ();
|
my @des_cmds = ();
|
my @des_cmds = ();
|
my @gen_cmds = ();
|
my @gen_cmds = ();
|
|
my @top_levels =();
|
|
my @children =();
|
|
|
|
|
|
print "Build_elab_master \n";
|
|
|
my $number_of_cpus = yp::lib::get_number_of_cpus();
|
my $number_of_cpus = yp::lib::get_number_of_cpus();
|
|
|
my $home = cwd();
|
my $home = cwd();
|
|
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| Line 118... |
Line 124... |
{
|
{
|
|
|
my $library_status = yp::lib::get_library_status($vendor,$library);
|
my $library_status = yp::lib::get_library_status($vendor,$library);
|
if($library_status eq "active")
|
if($library_status eq "active")
|
{
|
{
|
# print "$vendor $library \n ";
|
|
run_vendor_library ( $vendor , $library)
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
|
|
|
|
sub run_vendor_library
|
|
{
|
|
my @params = @_;
|
|
my $library = pop(@params);
|
|
my $vendor = pop(@params);
|
|
|
|
|
|
my @components = yp::lib::find_components($vendor,$library);
|
my @components = yp::lib::find_components($vendor,$library);
|
|
|
foreach my $component (@components)
|
foreach my $component (@components)
|
| Line 144... |
Line 139... |
my $socgen_filename = yp::lib::find_componentConfiguration($vendor,$library,$component);
|
my $socgen_filename = yp::lib::find_componentConfiguration($vendor,$library,$component);
|
if($socgen_filename)
|
if($socgen_filename)
|
{
|
{
|
my $socgen_file = $parser->parse_file($socgen_filename);
|
my $socgen_file = $parser->parse_file($socgen_filename);
|
|
|
#print "ELAB_XXXXX build_master $vendor $library \n";
|
|
|
|
#/*********************************************************************************************/
|
#/*********************************************************************************************/
|
#/ elaborate each testbench */
|
#/ elaborate each testbench */
|
#/ */
|
#/ */
|
#/*********************************************************************************************/
|
#/*********************************************************************************************/
|
|
|
foreach my $j_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:testbenches/socgen:testbench/socgen:variant"))
|
foreach my $j_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:testbenches/socgen:testbench/socgen:variant"))
|
{
|
{
|
|
|
my $testbench_variant = $j_name ->findnodes('./text()')->to_literal ;
|
my $testbench_variant = $j_name ->findnodes('./text()')->to_literal ;
|
my $testbench_version = $j_name ->findnodes('../socgen:version/text()')->to_literal ;
|
my $testbench_version = $j_name ->findnodes('../socgen:version/text()')->to_literal ;
|
my $testbench_configuration = $j_name ->findnodes('../socgen:configuration/text()')->to_literal ;
|
my $testbench_config = $j_name ->findnodes('../socgen:configuration/text()')->to_literal ;
|
my $testbench_instance = $j_name ->findnodes('../socgen:bus/socgen:instance/text()')->to_literal ;
|
my $testbench_instance = $j_name ->findnodes('../socgen:bus/socgen:instance/text()')->to_literal ;
|
my $testbench_bus_name = $j_name ->findnodes('../socgen:bus/socgen:bus_name/text()')->to_literal ;
|
my $testbench_bus_name = $j_name ->findnodes('../socgen:bus/socgen:bus_name/text()')->to_literal ;
|
|
|
|
|
if(defined $testbench_configuration )
|
if(defined $testbench_config && length $testbench_config > 0)
|
{
|
{
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -configuration configuration -env sim -tool testbenches -unit testbench \n";
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -configuration ${testbench_config} \n";
|
}
|
}
|
else
|
else
|
{
|
{
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -env sim -tool testbenches -unit testbench \n";
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} \n";
|
}
|
}
|
|
|
|
|
push @elab_cmds, $cmd;
|
push @elab_cmds, $cmd;
|
|
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} \n ";
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} \n ";
|
push @gen_cmds, $cmd;
|
push @gen_cmds, $cmd;
|
|
|
| Line 217... |
Line 214... |
{
|
{
|
# print "YYYY $prefix $vendor $library $component $testbench_version $test_name \n ";
|
# print "YYYY $prefix $vendor $library $component $testbench_version $test_name \n ";
|
|
|
#print "ELAB_XXXXX test_variant $vendor $library \n";
|
#print "ELAB_XXXXX test_variant $vendor $library \n";
|
|
|
|
push @top_levels, "${vendor}::${library}::${component}::${testbench_version}::${test_name}";
|
|
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -env sim -tool icarus -unit test -name $test_name \n";
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -env sim -tool icarus -unit test -name $test_name \n";
|
# print "$cmd";
|
|
# if (system($cmd)) {}
|
|
push @elab_cmds, $cmd;
|
push @elab_cmds, $cmd;
|
|
|
|
|
|
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -name $test_name \n";
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -name $test_name \n";
|
# print "$cmd";
|
|
# if (system($cmd)) {}
|
|
push @gen_cmds, $cmd;
|
push @gen_cmds, $cmd;
|
|
|
$cmd ="./tools/verilog/gen_design -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -name $test_name \n";
|
$cmd ="./tools/verilog/gen_design -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -name $test_name \n";
|
# print "$cmd";
|
|
# if (system($cmd)) {}
|
|
push @des_cmds, $cmd;
|
push @des_cmds, $cmd;
|
|
|
|
|
|
|
|
|
| Line 253... |
Line 248... |
}
|
}
|
|
|
|
|
|
|
|
|
#/*********************************************************************************************/
|
|
#/ elaborate each fpga */
|
|
#/ */
|
|
#/*********************************************************************************************/
|
|
|
|
foreach my $j_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:syn/socgen:fpgas/socgen:fpga/socgen:variant"))
|
|
{
|
|
my $fpga_variant = $j_name ->findnodes('./text()')->to_literal ;
|
|
my $fpga_version = $j_name ->findnodes('../socgen:version/text()')->to_literal ;
|
|
my $fpga_configuration = $j_name ->findnodes('../socgen:configuration/text()')->to_literal ;
|
|
|
|
if(defined $fpga_configuration )
|
|
{
|
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -configuration $fpga_configuration -env syn -tool fpgas -unit fpga \n";
|
|
}
|
|
else
|
|
{
|
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -env syn -tool fpgas -unit fpga \n";
|
|
}
|
|
|
|
# push @elab_cmds, $cmd;
|
|
|
|
|
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} ";
|
|
# push @gen_cmds, $cmd;
|
|
|
|
$cmd ="./tools/verilog/gen_design -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} ";
|
|
# push @des_cmds, $cmd;
|
|
}
|
|
|
|
|
|
|
|
|
|
#/*********************************************************************************************/
|
#/*********************************************************************************************/
|
| Line 311... |
Line 277... |
{
|
{
|
# print "YYYY $prefix $vendor $library $component $fpga_version $chip_name \n ";
|
# print "YYYY $prefix $vendor $library $component $fpga_version $chip_name \n ";
|
|
|
#print "ELAB_XXXXX test_variant $vendor $library \n";
|
#print "ELAB_XXXXX test_variant $vendor $library \n";
|
|
|
|
push @top_levels, "${vendor}::${library}::${component}::${fpga_version}::${chip_name}";
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -env syn -tool ise -unit chip -name $chip_name \n";
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -env syn -tool ise -unit chip -name $chip_name \n";
|
# print "$cmd";
|
|
|
|
push @elab_cmds, $cmd;
|
push @elab_cmds, $cmd;
|
|
|
|
|
|
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -name $chip_name \n";
|
$cmd ="./tools/verilog/gen_root -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -name $chip_name \n";
|
# print "$cmd";
|
|
|
|
push @gen_cmds, $cmd;
|
push @gen_cmds, $cmd;
|
|
|
$cmd ="./tools/verilog/gen_design -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -name $chip_name \n";
|
$cmd ="./tools/verilog/gen_design -vendor ${vendor} -library ${library} -component ${component} -version ${fpga_version} -name $chip_name \n";
|
# print "$cmd";
|
|
|
|
push @des_cmds, $cmd;
|
push @des_cmds, $cmd;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
#/*********************************************************************************************/
|
|
#/ elaborate for each rtlcheck */
|
|
#/ */
|
|
#/*********************************************************************************************/
|
|
|
|
foreach my $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:rtl_check/socgen:lint/socgen:name"))
|
|
{
|
|
my $lint_name = $i_name ->findnodes('./text()')->to_literal ;
|
|
my $lint_variant = $i_name ->findnodes('../socgen:variant/text()')->to_literal ;
|
|
|
|
foreach my $j_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:testbenches/socgen:testbench/socgen:variant"))
|
|
{
|
|
my $testbench_variant = $j_name ->findnodes('./text()')->to_literal ;
|
|
my $testbench_version = $j_name ->findnodes('../socgen:version/text()')->to_literal ;
|
|
|
|
if($lint_variant eq $testbench_variant )
|
|
{
|
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${testbench_version} -env sim -tool rtl_check -unit lint -name $lint_name \n";
|
|
push @elab_cmds, $cmd;
|
|
}
|
|
|
|
}
|
|
}
|
|
|
|
|
|
#/**********************************************************************************************/
|
|
#/ elaborate for each top module */
|
|
#/ */
|
|
#/*********************************************************************************************/
|
|
|
|
foreach my $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:configurations/socgen:configuration/socgen:version"))
|
|
{
|
|
my $version_name = $i_name ->findnodes('./text()')->to_literal ;
|
|
my $configuration = $i_name ->findnodes('../socgen:name/text()')->to_literal ;
|
|
$cmd ="./tools/verilog/elab_verilog -vendor ${vendor} -library ${library} -component ${component} -version ${version_name} -configuration ${configuration}\n";
|
|
push @elab_cmds, $cmd;
|
|
}
|
|
|
|
|
}
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
}
|
|
}
|
}
|
}
|
}
|
}
|
|
|
|
|
|
|
|
|
|
|
|
@elab_cmds = sys::lib::trim_sort(@elab_cmds);
|
|
|
|
print "Start elab_cmds \n";
|
|
|
|
foreach $cmd (@elab_cmds)
|
|
{
|
|
|
|
# $manager->start and next;
|
|
#print "$cmd";
|
|
if (system($cmd)) {}
|
|
# $manager->finish;
|
|
}
|
|
|
|
|
|
print "End elab_cmds \n";
|
|
|
|
|
|
|
|
|
|
|
| Line 358... |
Line 387... |
|
|
|
|
|
|
|
|
|
|
|
@top_levels = sys::lib::trim_sort(@top_levels);
|
|
|
|
|
|
foreach $level (@top_levels)
|
|
{
|
|
|
|
( $ven,$lib,$cmp,$ver,$nam) = split( /\::/ , $level);
|
|
|
|
my $elab_db_filename = yp::lib::get_elab_db_filename($ven,$lib,$cmp,$ver,"default");
|
|
|
|
my $elab_db = new BerkeleyDB::Hash( -Filename => "$elab_db_filename", -Flags => DB_CREATE ) or die "Cannot open $elab_db_filename: $!";
|
|
|
|
my $key;
|
|
my $value;
|
|
|
|
$cursor = $elab_db ->db_cursor() ;
|
|
while ($cursor->c_get($key, $value, DB_NEXT) == 0)
|
|
{
|
|
|
|
# print "$key \n";
|
|
my $VLNV;
|
|
my $vlnv;
|
|
|
|
|
|
( ${VLNV},${vlnv}) = split( /___root./ , $key);
|
|
if($VLNV eq "component")
|
|
{
|
|
if($vlnv)
|
|
{
|
|
push @children,$value;
|
|
|
}
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
@children = sys::lib::trim_sort(@children);
|
|
|
|
foreach my $child (@children)
|
|
{
|
|
my $ven;
|
|
my $lib;
|
|
my $cmp;
|
|
my $ver;
|
|
( ${ven},${lib},${cmp},${ver}) = split( /:/ , $child);
|
|
|
|
|
|
|
|
my $child_filename = yp::lib::find_componentConfiguration($ven,$lib,$cmp);
|
|
if($child_filename)
|
|
{
|
|
my $socgen_file = $parser->parse_file($child_filename);
|
|
foreach my $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:configurations/socgen:configuration/socgen:version"))
|
|
{
|
|
my $version_name = $i_name ->findnodes('./text()')->to_literal ;
|
|
my $configuration = $i_name ->findnodes('../socgen:name/text()')->to_literal ;
|
|
$cmd ="./tools/verilog/elab_verilog -vendor ${ven} -library ${lib} -component ${cmp} -version ${version_name} -configuration ${configuration}\n";
|
|
|
|
if (system($cmd)) {}
|
|
}
|
|
}
|
}
|
}
|
|
|
|
|
|
|
@elab_cmds = sys::lib::trim_sort(@elab_cmds);
|
|
|
|
|
|
|
|
|
|
@des_cmds = sys::lib::trim_sort(@des_cmds);
|
@des_cmds = sys::lib::trim_sort(@des_cmds);
|
@gen_cmds = sys::lib::trim_sort(@gen_cmds);
|
@gen_cmds = sys::lib::trim_sort(@gen_cmds);
|
|
|
|
|
|
#print "Execute cmds \n";
|
|
|
#my $manager = new Parallel::ForkManager( $number_of_cpus );
|
my $manager = new Parallel::ForkManager( $number_of_cpus );
|
|
|
|
|
|
|
foreach $cmd (@elab_cmds)
|
|
{
|
|
# $manager->start and next;
|
|
if (system($cmd)) {}
|
|
# $manager->finish;
|
|
}
|
|
|
|
#$manager->wait_all_children;
|
#$manager->wait_all_children;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
foreach $cmd (@des_cmds)
|
foreach $cmd (@des_cmds)
|
{
|
{
|
if (system($cmd)) {}
|
if (system($cmd)) {}
|
}
|
}
|
|
|
|
print "End des_cmds \n";
|
|
|
foreach $cmd (@gen_cmds)
|
foreach $cmd (@gen_cmds)
|
{
|
{
|
# $manager->start and next;
|
# $manager->start and next;
|
if (system($cmd)) {}
|
if (system($cmd)) {}
|
# $manager->finish;
|
# $manager->finish;
|
}
|
}
|
|
|
#$manager->wait_all_children;
|
#$manager->wait_all_children;
|
|
|
|
print "End All \n";
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
return(0);
|
|
|
|
}
|
|
|
|
