OpenCores
URL https://opencores.org/ocsvn/sockit_owm/sockit_owm/trunk

Subversion Repositories sockit_owm

[/] [sockit_owm/] [trunk/] [HAL/] [src/] [owlnk.c] - Diff between revs 2 and 3

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 2 Rev 3
Line 74... Line 74...
{
{
   int reg;
   int reg;
   int ovd = (sockit_owm.ovd >> portnum) & 0x1;
   int ovd = (sockit_owm.ovd >> portnum) & 0x1;
 
 
   // lock transfer
   // lock transfer
   ALT_SEM_PEND (sockit_owm.trn, 0);
   ALT_SEM_PEND (sockit_owm.cyc, 0);
 
 
   // write RST
   // reset pulse
   IOWR_SOCKIT_OWM (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_POWER_OFST)
   IOWR_SOCKIT_OWM_CTL (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_CTL_POWER_OFST    )
                                   | (portnum        << SOCKIT_OWM_SEL_OFST)
                                       | (portnum        << SOCKIT_OWM_CTL_SEL_OFST      )
                                   | (sockit_owm.ena << SOCKIT_OWM_ETX_OFST)
                                       | (sockit_owm.ien  ? SOCKIT_OWM_CTL_IEN_MSK : 0x00)
                                   | (ovd            << SOCKIT_OWM_OVD_OFST)
                                       | (                  SOCKIT_OWM_CTL_CYC_MSK       )
                                   |                    SOCKIT_OWM_RST_MSK);
                                       | (ovd             ? SOCKIT_OWM_CTL_OVD_MSK : 0x00)
 
                                       | (                  SOCKIT_OWM_CTL_RST_MSK       ));
 
 
   // wait for irq to set the transfer end flag
   // wait for irq to set the transfer end flag
   ALT_FLAG_PEND (sockit_owm.irq, 0x1, OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, 0);
   ALT_FLAG_PEND (sockit_owm.irq, 0x1, OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, 0);
   // wait for STX (end of transfer cycle) and read the presence status
   // wait for STX (end of transfer cycle) and read the presence status
   while ((reg = IORD_SOCKIT_OWM (sockit_owm.base)) & SOCKIT_OWM_TRN_MSK);
   while ((reg = IORD_SOCKIT_OWM_CTL (sockit_owm.base)) & SOCKIT_OWM_CTL_CYC_MSK);
 
 
   // release transfer lock
   // release transfer lock
   ALT_SEM_POST (sockit_owm.trn);
   ALT_SEM_POST (sockit_owm.cyc);
 
 
   // return DRX (presence detect)
   // return negated DAT (presence detect)
   return (~reg >> SOCKIT_OWM_DAT_OFST) & 0x1;
   return (~reg & SOCKIT_OWM_CTL_DAT_MSK);  // NOTE the shortcut
}
}
 
 
//--------------------------------------------------------------------------
//--------------------------------------------------------------------------
// Send 1 bit of communication to the 1-Wire Net and return the
// Send 1 bit of communication to the 1-Wire Net and return the
// result 1 bit read from the 1-Wire Net.  The parameter 'sendbit'
// result 1 bit read from the 1-Wire Net.  The parameter 'sendbit'
Line 114... Line 115...
{
{
   int reg;
   int reg;
   int ovd = (sockit_owm.ovd >> portnum) & 0x1;
   int ovd = (sockit_owm.ovd >> portnum) & 0x1;
 
 
   // lock transfer
   // lock transfer
   ALT_SEM_PEND (sockit_owm.trn, 0);
   ALT_SEM_PEND (sockit_owm.cyc, 0);
 
 
   // write RST
   // read/write data
   IOWR_SOCKIT_OWM (sockit_owm.base, (sockit_owm.pwr  << SOCKIT_OWM_POWER_OFST)
   IOWR_SOCKIT_OWM_CTL (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_CTL_POWER_OFST    )
                                   | (portnum         << SOCKIT_OWM_SEL_OFST)
                                       | (portnum        << SOCKIT_OWM_CTL_SEL_OFST      )
                                   | (sockit_owm.ena  << SOCKIT_OWM_ETX_OFST)
                                       | (sockit_owm.ien  ? SOCKIT_OWM_CTL_IEN_MSK : 0x00)
                                   | (ovd             << SOCKIT_OWM_OVD_OFST)
                                       | (                  SOCKIT_OWM_CTL_CYC_MSK       )
                                   | ((sendbit & 0x1) << SOCKIT_OWM_DAT_OFST));
                                       | (ovd             ? SOCKIT_OWM_CTL_OVD_MSK : 0x00)
 
                                       | (sendbit         & SOCKIT_OWM_CTL_DAT_MSK       ));  // NOTE the shortcut
 
 
   // wait for irq to set the transfer end flag
   // wait for irq to set the transfer end flag
   ALT_FLAG_PEND (sockit_owm.irq, 0x1, OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, 0);
   ALT_FLAG_PEND (sockit_owm.irq, 0x1, OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, 0);
   // wait for STX (end of transfer cycle) and read the read data bit
   // wait for STX (end of transfer cycle) and read the read data bit
   while ((reg = IORD_SOCKIT_OWM (sockit_owm.base)) & SOCKIT_OWM_TRN_MSK);
   while ((reg = IORD_SOCKIT_OWM_CTL (sockit_owm.base)) & SOCKIT_OWM_CTL_CYC_MSK);
 
 
   // release transfer lock
   // release transfer lock
   ALT_SEM_POST (sockit_owm.trn);
   ALT_SEM_POST (sockit_owm.cyc);
 
 
   // return DRX (read bit)
   // return DAT (read bit)
   return (reg >> SOCKIT_OWM_DAT_OFST) & 0x1;
   return (reg & SOCKIT_OWM_CTL_DAT_MSK);  // NOTE the shortcut
}
}
 
 
//--------------------------------------------------------------------------
//--------------------------------------------------------------------------
// Send 8 bits of communication to the 1-Wire Net and return the
// Send 8 bits of communication to the 1-Wire Net and return the
// result 8 bits read from the 1-Wire Net.  The parameter 'sendbyte'
// result 8 bits read from the 1-Wire Net.  The parameter 'sendbyte'
Line 203... Line 205...
//
//
// Returns:  current 1-Wire Net speed
// Returns:  current 1-Wire Net speed
//
//
SMALLINT owSpeed(int portnum, SMALLINT new_speed)
SMALLINT owSpeed(int portnum, SMALLINT new_speed)
{
{
   if (new_speed == MODE_OVERDRIVE)  sockit_owm.ovd |=  (1 << portnum);
   int select;
   if (new_speed == MODE_NORMAL   )  sockit_owm.ovd &= ~(1 << portnum);
   select = 0x1 << portnum;
 
   // if overdrive is implemented use it
 
   if (sockit_owm.ovd_e) {
 
      if (new_speed == MODE_OVERDRIVE)  sockit_owm.ovd |=  select;
 
      if (new_speed == MODE_NORMAL   )  sockit_owm.ovd &= ~select;
 
   }
   // return the current port state
   // return the current port state
   return ((sockit_owm.ovd >> portnum) & 0x1) ? MODE_OVERDRIVE : MODE_NORMAL;
   return (sockit_owm.ovd & select) ? MODE_OVERDRIVE : MODE_NORMAL;
}
}
 
 
//--------------------------------------------------------------------------
//--------------------------------------------------------------------------
// Set the 1-Wire Net line level.  The values for NewLevel are
// Set the 1-Wire Net line level.  The values for NewLevel are
// as follows:
// as follows:
Line 228... Line 235...
SMALLINT owLevel(int portnum, SMALLINT new_level)
SMALLINT owLevel(int portnum, SMALLINT new_level)
{
{
   if (new_level == MODE_STRONG5) {
   if (new_level == MODE_STRONG5) {
      // set the power bit
      // set the power bit
      sockit_owm.pwr |=  (1 << portnum);
      sockit_owm.pwr |=  (1 << portnum);
      IOWR_SOCKIT_OWM (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_POWER_OFST)
      IOWR_SOCKIT_OWM_CTL (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_CTL_POWER_OFST) | SOCKIT_OWM_CTL_PWR_MSK);
                                      |                    SOCKIT_OWM_PWR_MSK
 
                                      |                    SOCKIT_OWM_IDL_MSK);
 
   }
   }
   if (new_level == MODE_NORMAL) {
   if (new_level == MODE_NORMAL) {
      // clear the power bit
      // clear the power bit
      sockit_owm.pwr &= ~(1 << portnum);
      sockit_owm.pwr &= ~(1 << portnum);
      IOWR_SOCKIT_OWM (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_POWER_OFST)
      IOWR_SOCKIT_OWM_CTL (sockit_owm.base, (sockit_owm.pwr << SOCKIT_OWM_CTL_POWER_OFST));
                                      |                    SOCKIT_OWM_IDL_MSK);
 
   }
   }
   // return the current port state
   // return the current port state
   return ((sockit_owm.pwr >> portnum) & 0x1) ? MODE_STRONG5 : MODE_NORMAL;
   return ((sockit_owm.pwr >> portnum) & 0x1) ? MODE_STRONG5 : MODE_NORMAL;
}
}
 
 
Line 266... Line 270...
void msDelay(int len)
void msDelay(int len)
{
{
#if SOCKIT_OWM_HW_DLY
#if SOCKIT_OWM_HW_DLY
   int i;
   int i;
 
 
 
   // compute the number delay cycles depending on delay time
 
   len = (len * sockit_owm.f_dly) >> 16;
 
 
   // lock transfer
   // lock transfer
   ALT_SEM_PEND (sockit_owm.trn, 0);
   ALT_SEM_PEND (sockit_owm.cyc, 0);
 
 
   for (i=0; i<len; i++) {
   for (i=0; i<len; i++) {
      // create a 960us pause
      // create a 960us pause
      IOWR_SOCKIT_OWM (sockit_owm.base, ( sockit_owm.pwr        << SOCKIT_OWM_POWER_OFST)
      IOWR_SOCKIT_OWM_CTL (sockit_owm.base, ( sockit_owm.pwr        << SOCKIT_OWM_CTL_POWER_OFST    )
                                      | ( sockit_owm.ena        << SOCKIT_OWM_ETX_OFST)
                                          | ( sockit_owm.ien         ? SOCKIT_OWM_CTL_IEN_MSK : 0x00)
                                      | ((sockit_owm.pwr & 0x1) << SOCKIT_OWM_PWR_OFST)
                                          | ((sockit_owm.pwr & 0x1)  ? SOCKIT_OWM_CTL_PWR_MSK : 0x00)
                                      |                            SOCKIT_OWM_DLY_MSK);
                                          | (                          SOCKIT_OWM_CTL_CYC_MSK       )
 
                                          | (                          SOCKIT_OWM_CTL_DLY_MSK       ));
 
 
     // wait for irq to set the transfer end flag
     // wait for irq to set the transfer end flag
     ALT_FLAG_PEND (sockit_owm.irq, 0x1, OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, 0);
     ALT_FLAG_PEND (sockit_owm.irq, 0x1, OS_FLAG_WAIT_SET_ANY + OS_FLAG_CONSUME, 0);
     // wait for STX (end of transfer cycle)
     // wait for STX (end of transfer cycle)
     while (IORD_SOCKIT_OWM (sockit_owm.base) & SOCKIT_OWM_TRN_MSK);
     while (IORD_SOCKIT_OWM_CTL (sockit_owm.base) & SOCKIT_OWM_CTL_CYC_MSK);
 
 
     // release transfer lock
     // release transfer lock
     ALT_SEM_POST (sockit_owm.trn);
     ALT_SEM_POST (sockit_owm.cyc);
   }
   }
#else
#else
#ifdef UCOS_II
#ifdef UCOS_II
   // uCOS-II timed delay
   // uCOS-II timed delay
   OSTimeDlyHMSM(0,0,0,len);
   OSTimeDlyHMSM(0,0,0,len);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.