URL
https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 32 |
Rev 35 |
| Line 1... |
Line 1... |
Analysis & Synthesis Status : Successful - Thu Aug 24 22:37:46 2017
|
Analysis & Synthesis Status : Successful - Fri Sep 15 08:13:05 2017
|
Quartus Prime Version : 17.0.1 Build 598 06/07/2017 SJ Lite Edition
|
Quartus Prime Version : 17.0.1 Build 598 06/07/2017 SJ Lite Edition
|
Revision Name : spw_fifo_ulight
|
Revision Name : spw_fifo_ulight
|
Top-level Entity Name : SPW_ULIGHT_FIFO
|
Top-level Entity Name : SPW_ULIGHT_FIFO
|
Family : Cyclone V
|
Family : Cyclone V
|
Logic utilization (in ALMs) : N/A
|
Logic utilization (in ALMs) : N/A
|
Total registers : 3603
|
Total registers : 4692
|
Total pins : 15
|
Total pins : 15
|
Total virtual pins : 0
|
Total virtual pins : 0
|
Total block memory bits : 1,152
|
Total block memory bits : 0
|
Total DSP Blocks : 0
|
Total DSP Blocks : 0
|
Total HSSI RX PCSs : 0
|
Total HSSI RX PCSs : 0
|
Total HSSI PMA RX Deserializers : 0
|
Total HSSI PMA RX Deserializers : 0
|
Total HSSI TX PCSs : 0
|
Total HSSI TX PCSs : 0
|
Total HSSI PMA TX Serializers : 0
|
Total HSSI PMA TX Serializers : 0
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.