OpenCores
URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

[/] [spacewiresystemc/] [trunk/] [vpi/] [vpi_test_stress/] [write_fsm_spw_ultra_light.h] - Diff between revs 5 and 12

Show entire file | Details | Blame | View Log

Rev 5 Rev 12
Line 9... Line 9...
        link_disable_value.format   = vpiIntVal;
        link_disable_value.format   = vpiIntVal;
 
 
        link_enable_value.value.integer  = SC_TOP->verilog_linkenable();
        link_enable_value.value.integer  = SC_TOP->verilog_linkenable();
        vpi_put_value(LINKSTART, &link_enable_value, NULL, vpiNoDelay);
        vpi_put_value(LINKSTART, &link_enable_value, NULL, vpiNoDelay);
 
 
        //if(SC_TOP->verilog_linkenable())
 
        //      printf("TESTE\n");
 
 
 
        auto_start_value.value.integer   = SC_TOP->verilog_autostart();
        auto_start_value.value.integer   = SC_TOP->verilog_autostart();
        vpi_put_value(AUTOSTART, &auto_start_value, NULL, vpiNoDelay);
        vpi_put_value(AUTOSTART, &auto_start_value, NULL, vpiNoDelay);
 
 
        link_disable_value.value.integer = SC_TOP->verilog_linkdisable();
        link_disable_value.value.integer = SC_TOP->verilog_linkdisable();
        vpi_put_value(LINKDISABLE, &link_disable_value, NULL, vpiNoDelay);
        vpi_put_value(LINKDISABLE, &link_disable_value, NULL, vpiNoDelay);

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.