| Line 47... |
Line 47... |
// Inputs
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// Inputs
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clk, se, reset, rst_tri_en, rml_ecl_wtype_e, rml_ecl_other_e,
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clk, se, reset, rst_tri_en, rml_ecl_wtype_e, rml_ecl_other_e,
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exu_tlu_spill_e, tlu_exu_cwpccr_update_m, tlu_exu_cwp_retry_m,
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exu_tlu_spill_e, tlu_exu_cwpccr_update_m, tlu_exu_cwp_retry_m,
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tlu_exu_cwp_m, thr_d, ecl_rml_thr_m, ecl_rml_thr_w, tid_e,
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tlu_exu_cwp_m, thr_d, ecl_rml_thr_m, ecl_rml_thr_w, tid_e,
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next_cwp_w, next_cwp_e, cwp_wen_w, save_e, restore_e,
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next_cwp_w, next_cwp_e, cwp_wen_w, save_e, restore_e,
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ifu_exu_flushw_e, ecl_rml_cwp_wen_e, full_swap_e, rml_kill_w
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ifu_exu_flushw_e, ecl_rml_cwp_wen_e, full_swap_e, rml_kill_w, next_cwp
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) ;
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) ;
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input clk;
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input clk;
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input se;
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input se;
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input reset;
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input reset;
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input rst_tri_en;
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input rst_tri_en;
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| Line 93... |
Line 93... |
output [3:0] rml_ecl_swap_done;
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output [3:0] rml_ecl_swap_done;
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output exu_tlu_cwp_cmplt;
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output exu_tlu_cwp_cmplt;
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output [1:0] exu_tlu_cwp_cmplt_tid;
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output [1:0] exu_tlu_cwp_cmplt_tid;
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output exu_tlu_cwp_retry;
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output exu_tlu_cwp_retry;
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output [3:0] oddwin_w;
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output [3:0] oddwin_w;
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output [11:0] next_cwp;
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wire can_swap;
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wire can_swap;
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wire swapping;
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wire swapping;
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wire just_swapped;
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wire just_swapped;
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wire full_swap_m;
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wire full_swap_m;
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| Line 253... |
Line 254... |
assign cwp_wen_l[3:0] = ~(cwp_wen_tlu_w[3:0] | cwp_wen_spill[3:0] |
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assign cwp_wen_l[3:0] = ~(cwp_wen_tlu_w[3:0] | cwp_wen_spill[3:0] |
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{cwp_wen_thr3_w,cwp_wen_thr2_w, cwp_wen_thr1_w,cwp_wen_thr0_w});
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{cwp_wen_thr3_w,cwp_wen_thr2_w, cwp_wen_thr1_w,cwp_wen_thr0_w});
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// oddwin_w is the new value of cwp[0]
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// oddwin_w is the new value of cwp[0]
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assign oddwin_w[3:0] = {cwp_thr3_next[0],cwp_thr2_next[0],cwp_thr1_next[0],cwp_thr0_next[0]};
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assign oddwin_w[3:0] = {cwp_thr3_next[0],cwp_thr2_next[0],cwp_thr1_next[0],cwp_thr0_next[0]};
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assign next_cwp={cwp_thr3_next,cwp_thr2_next,cwp_thr1_next,cwp_thr0_next};
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// mux between new and current value
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// mux between new and current value
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mux4ds #(3) cwp_next0_mux(.dout(cwp_thr0_next[2:0]),
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mux4ds #(3) cwp_next0_mux(.dout(cwp_thr0_next[2:0]),
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.in0(cwp_thr0[2:0]),
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.in0(cwp_thr0[2:0]),
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.in1(next_cwp_w[2:0]),
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.in1(next_cwp_w[2:0]),
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.in2(tlu_exu_cwp_w[2:0]),
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.in2(tlu_exu_cwp_w[2:0]),
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