| Line 106... |
Line 106... |
reg [31:0] byte_match ;
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reg [31:0] byte_match ;
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reg [31:0] byte_overlap ;
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reg [31:0] byte_overlap ;
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reg [31:0] ld_full_raw ;
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reg [31:0] ld_full_raw ;
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reg [31:0] ld_partial_raw ;
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reg [31:0] ld_partial_raw ;
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reg [44:15] alt_wr_data ;
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reg [44:15] alt_wr_data ;
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reg [44:15] pipe_wr_data ;
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wire [44:15] pipe_wr_data ;
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reg [14:0] camwr_data ;
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reg [14:0] camwr_data ;
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reg wptr_vld ;
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reg wptr_vld ;
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reg rptr_vld_tmp ;
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reg rptr_vld_tmp ;
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reg [1:0] cam_tid ;
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reg [1:0] cam_tid ;
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reg [1:0] cam_vld ;
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reg [1:0] cam_vld ;
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| Line 166... |
Line 166... |
rw_wdline[i] <= 1'b0;
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rw_wdline[i] <= 1'b0;
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end
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end
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end
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end
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`endif
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`endif
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assign pipe_wr_data[44:15] = stb_cam_data[44:15];
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always @(posedge rclk)
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always @(posedge rclk)
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begin
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begin
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pipe_wr_data[44:15] <= stb_cam_data[44:15];
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alt_wr_data[44:15] <= stb_alt_wr_data[44:15];
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alt_wr_data[44:15] <= stb_alt_wr_data[44:15];
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camwr_data[14:0] <= stb_camwr_data[14:0];
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camwr_data[14:0] <= stb_camwr_data[14:0];
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wptr_vld <= stb_cam_wptr_vld ;
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wptr_vld <= stb_cam_wptr_vld ;
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rptr_vld_tmp <= stb_cam_rptr_vld ;
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rptr_vld_tmp <= stb_cam_rptr_vld ;
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cam_tid[1:0] <= stb_cam_cm_tid[1:0] ;
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cam_tid[1:0] <= stb_cam_cm_tid[1:0] ;
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| Line 271... |
Line 272... |
//
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//
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// | 40-3=37b(pa) | 1b(stquad) | 8b(bytemask) | <- use
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// | 40-3=37b(pa) | 1b(stquad) | 8b(bytemask) | <- use
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// | 45:9 | 8 | 7:0 | <- input port
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// | 45:9 | 8 | 7:0 | <- input port
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// **^ stquad rm'ed
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// **^ stquad rm'ed
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assign cam_data[44:0] = {stb_cam_data[44:15],stb_camwr_data[14:0]};
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reg [14:0] stb_camwr_data_d;
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reg ldq_d;
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reg stb_cam_vld_d;
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reg scan_ena_d;
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reg [44:0] stb_ramc_d [NUMENTRIES-1:0] /* synthesis syn_ramstyle = block_ram syn_ramstyle = no_rw_check */;
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always @ (posedge rclk)
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always @ (posedge rclk)
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begin
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begin
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stb_camwr_data_d[14:0]<=stb_camwr_data[14:0];
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ldq_d<=ldq;
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stb_cam_vld_d<=stb_cam_vld;
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scan_ena_d<=scan_ena;
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for (l=0;l<NUMENTRIES;l=l+1)
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stb_ramc_d[l]<=stb_ramc[l];
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end
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assign cam_data[44:0] = {stb_cam_data[44:15],stb_camwr_data_d[14:0]};
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always @( * )
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for (l=0;l<NUMENTRIES;l=l+1)
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for (l=0;l<NUMENTRIES;l=l+1)
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begin
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begin
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ramc_entry[44:0] = stb_ramc[l] ;
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ramc_entry[44:0] = stb_ramc_d[l] ;
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cam_tag[36:0] = ramc_entry[44:8] ;
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cam_tag[36:0] = ramc_entry[44:8] ;
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cam_bmask[7:0] = ramc_entry[7:0] ;
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cam_bmask[7:0] = ramc_entry[7:0] ;
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//stq = ramc_entry[8] ; // additional bit -stq
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ptag_hit[l] = (cam_tag[36:1] == cam_data[44:9]) &
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(((cam_tag[0] == cam_data[8]) & ~ldq_d) | ldq_d) & stb_cam_vld_d & ~scan_ena_d ;
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// Prior to adding stb_quad_ld_cam port.
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byte_match[l] = |(cam_bmask[7:0] & cam_data[7:0]) & stb_cam_vld_d & ~scan_ena_d ;
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/*ptag_hit[l] =
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((cam_tag[36:1] == cam_data[44:9]) &
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(((cam_tag[0] == cam_data[8]) & ~stq) | stq)) & stcam_vld_tmp & ~scan_ena ;*/
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// Modification.
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// * remove ramc_entry[8]. Or keep it but it won't be used.
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// * Instead we'll control this from outside.
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ptag_hit[l] =
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(cam_tag[36:1] == cam_data[44:9]) &
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(((cam_tag[0] == cam_data[8]) & ~ldq) | ldq) & stb_cam_vld & ~scan_ena ;
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byte_match[l] = |(cam_bmask[7:0] & cam_data[7:0]) & stb_cam_vld & ~scan_ena ;
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// Simplification :
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// Simplification :
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byte_overlap[l] = |(~cam_bmask[7:0] & cam_data[7:0]) & stb_cam_vld & ~scan_ena ;
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byte_overlap[l] = |(~cam_bmask[7:0] & cam_data[7:0]) & stb_cam_vld_d & ~scan_ena_d ;
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end
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end
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end
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// Mux the raw signals down to 8b quantities. Squash mask comes mid-way thru cycle.
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// Mux the raw signals down to 8b quantities. Squash mask comes mid-way thru cycle.
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assign byte_overlap_mx[7:0] =
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assign byte_overlap_mx[7:0] =
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(cam_tid[1:0] == 2'b00) ? byte_overlap[7:0] :
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(cam_tid[1:0] == 2'b00) ? byte_overlap[7:0] :
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