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--
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--
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-- CVS Revision History
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-- CVS Revision History
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--
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--
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-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
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-- Revision 1.1 2004/06/09 19:24:31 gedra
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-- Generic dual port ram model.
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--
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--
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--
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LIBRARY ieee;
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library ieee;
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USE ieee.std_logic_1164.ALL;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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entity dpram is
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entity dpram is
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generic (DATA_WIDTH: positive;
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generic (DATA_WIDTH: positive;
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ADDR_WIDTH: positive);
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RAM_WIDTH: positive);
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port (
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port (
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clk: in std_logic;
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clk: in std_logic;
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rst: in std_logic; -- reset is optional, not used here
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rst: in std_logic; -- reset is optional, not used here
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din: in std_logic_vector(DATA_WIDTH - 1 downto 0);
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din: in std_logic_vector(DATA_WIDTH - 1 downto 0);
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wr_en: in std_logic;
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wr_en: in std_logic;
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rd_en: in std_logic;
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rd_en: in std_logic;
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wr_addr: in std_logic_vector(ADDR_WIDTH - 1 downto 0);
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wr_addr: in std_logic_vector(RAM_WIDTH - 1 downto 0);
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rd_addr: in std_logic_vector(ADDR_WIDTH - 1 downto 0);
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rd_addr: in std_logic_vector(RAM_WIDTH - 1 downto 0);
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dout: out std_logic_vector(DATA_WIDTH - 1 downto 0));
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dout: out std_logic_vector(DATA_WIDTH - 1 downto 0));
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end dpram;
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end dpram;
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--library synplify; -- uncomment this line when using Synplify
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--library synplify; -- uncomment this line when using Synplify
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architecture rtl of dpram is
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architecture rtl of dpram is
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type memory_type is array (2**ADDR_WIDTH - 1 downto 0) of
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type memory_type is array (2**RAM_WIDTH - 1 downto 0) of
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std_logic_vector(DATA_WIDTH - 1 downto 0);
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std_logic_vector(DATA_WIDTH - 1 downto 0);
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signal memory: memory_type;
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signal memory: memory_type;
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signal lrd_addr: std_logic_vector(ADDR_WIDTH - 1 downto 0);
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signal lrd_addr: std_logic_vector(RAM_WIDTH - 1 downto 0);
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-- Enable syn_ramstyle attribute when using Xilinx to enable block ram
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-- Enable syn_ramstyle attribute when using Xilinx to enable block ram
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-- otherwise you get embedded CLB ram.
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-- otherwise you get embedded CLB ram.
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-- attribute syn_ramstyle : string;
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-- attribute syn_ramstyle : string;
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-- attribute syn_ramstyle of memory : signal is "block_ram";
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-- attribute syn_ramstyle of memory : signal is "block_ram";
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