URL https://opencores.org/ocsvn/spdif_interface/spdif_interface/trunk

Subversion Repositories spdif_interface

[/] [spdif_interface/] [trunk/] [rtl/] [vhdl/] [rx_package.vhd] - Diff between revs 38 and 42

Rev 38	Rev 42
Line 43...	Line 43...
`----------------------------------------------------------------------`	`----------------------------------------------------------------------`
`--`	`--`
`-- CVS Revision History`	`-- CVS Revision History`
`--`	`--`
`-- $Log: not supported by cvs2svn $`	`-- $Log: not supported by cvs2svn $`
	`-- Revision 1.8 2004/06/27 16:16:55 gedra`
	`-- Signal renaming and bug fix.`
	`--`
`-- Revision 1.7 2004/06/26 14:14:47 gedra`	`-- Revision 1.7 2004/06/26 14:14:47 gedra`
`-- Converted to numeric_std and fixed a few bugs.`	`-- Converted to numeric_std and fixed a few bugs.`
`--`	`--`
`-- Revision 1.6 2004/06/23 18:10:17 gedra`	`-- Revision 1.6 2004/06/23 18:10:17 gedra`
`-- Added Wishbone bus cycle decoder.`	`-- Added Wishbone bus cycle decoder.`
Line 152...	Line 155...
`port (`	`port (`
`wb_clk_i: in std_logic;`	`wb_clk_i: in std_logic;`
`rxen: in std_logic;`	`rxen: in std_logic;`
`spdif: in std_logic;`	`spdif: in std_logic;`
`lock: out std_logic;`	`lock: out std_logic;`
	`lock_evt: out std_logic; -- lock status change event`
`rx_data: out std_logic;`	`rx_data: out std_logic;`
`rx_data_en: out std_logic;`	`rx_data_en: out std_logic;`
`rx_block_start: out std_logic;`	`rx_block_start: out std_logic;`
`rx_frame_start: out std_logic;`	`rx_frame_start: out std_logic;`
`rx_channel_a: out std_logic;`	`rx_channel_a: out std_logic;`