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https://opencores.org/ocsvn/spdif_interface/spdif_interface/trunk
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Rev 62 |
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Line 44... |
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--
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--
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-- CVS Revision History
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-- CVS Revision History
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--
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--
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-- $Log: not supported by cvs2svn $
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-- $Log: not supported by cvs2svn $
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-- Revision 1.5 2004/07/19 16:58:37 gedra
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-- Fixed bug.
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--
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-- Revision 1.4 2004/07/12 17:06:41 gedra
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-- Revision 1.4 2004/07/12 17:06:41 gedra
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-- Fixed bug with lock event generation.
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-- Fixed bug with lock event generation.
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--
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--
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-- Revision 1.3 2004/07/11 16:19:50 gedra
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-- Revision 1.3 2004/07/11 16:19:50 gedra
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-- Bug-fix.
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-- Bug-fix.
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| Line 123... |
Line 126... |
minp <= 8 * WISHBONE_FREQ;
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minp <= 8 * WISHBONE_FREQ;
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last_cnt <= 0;
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last_cnt <= 0;
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trans <= '0';
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trans <= '0';
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valid <= '0';
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valid <= '0';
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preamble <= (ZERO, ZERO, ZERO, ZERO);
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preamble <= (ZERO, ZERO, ZERO, ZERO);
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max_thres <= 0;
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min_thres <= 0;
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new_preamble <= NONE;
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ztrans <= '0';
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new_pulse <= '0';
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else
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else
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if rising_edge(wb_clk_i) then
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if rising_edge(wb_clk_i) then
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-- sync spdif signal to wishbone clock
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-- sync spdif signal to wishbone clock
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zspdif <= spdif;
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zspdif <= spdif;
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spdif_in <= zspdif;
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spdif_in <= zspdif;
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| Line 239... |
Line 247... |
ud_b_en <= '0';
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ud_b_en <= '0';
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cs_a_en <= '0';
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cs_a_en <= '0';
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cs_b_en <= '0';
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cs_b_en <= '0';
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rx_error <= '0';
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rx_error <= '0';
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lock_evt <= '0';
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lock_evt <= '0';
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bit_cnt <= 0;
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pre_cnt <= 0;
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short_idx <= '0';
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frame_cnt <= 0;
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last_preamble <= NONE;
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elsif rising_edge(wb_clk_i) then
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elsif rising_edge(wb_clk_i) then
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zilock <= ilock;
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zilock <= ilock;
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if zilock /= ilock then -- generate event for event reg.
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if zilock /= ilock then -- generate event for event reg.
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lock_evt <= '1';
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lock_evt <= '1';
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else
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else
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