| Line 45... |
Line 45... |
//
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//
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`define SPI_DIVIDER_BIT_NB 16
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`define SPI_DIVIDER_BIT_NB 16
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|
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//
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//
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// Maximum nuber of bits that can be send/received at once. Alloved values are
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// Maximum nuber of bits that can be send/received at once. Alloved values are
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// 64, 32, 16 and 8. SPI_CHAR_LEN_BITS must be also set to 6, 5, 4 or 3 respectively.
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// 128, 64, 32, 16 and 8. SPI_CHAR_LEN_BITS must be also set to 7, 6, 5, 4 or 3 respectively.
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// Default is 64.
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// Default is 128.
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// If SPI_MAX_CHAR is 64, SPI_MAX_CHAR_64 must be defined, otherwise comment it
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// If SPI_MAX_CHAR is 64 or 128, SPI_MAX_CHAR_64 or SPI_MAX_CHAR_128 must be defined,
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//
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// otherwise comment it out.
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`define SPI_MAX_CHAR_64 1
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//
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`define SPI_MAX_CHAR 64
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`define SPI_MAX_CHAR_128 1
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`define SPI_CHAR_LEN_BITS 6
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//`define SPI_MAX_CHAR_64 1
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`define SPI_MAX_CHAR 128
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`define SPI_CHAR_LEN_BITS 7
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|
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//
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//
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// Number of device select signals.
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// Number of device select signals.
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//
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//
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`define SPI_SS_NB 8
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`define SPI_SS_NB 8
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| Line 65... |
Line 67... |
`define SPI_OFS_BITS 4:2
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`define SPI_OFS_BITS 4:2
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//
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//
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// Register offset
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// Register offset
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//
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//
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`define SPI_RX_L 0
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`define SPI_RX_0 0
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`define SPI_RX_H 1
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`define SPI_RX_1 1
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`define SPI_TX_L 0
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`define SPI_RX_2 2
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`define SPI_TX_H 1
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`define SPI_RX_3 3
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`define SPI_CTRL 2
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`define SPI_TX_0 0
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`define SPI_DEVIDE 3
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`define SPI_TX_1 1
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`define SPI_SS 4
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`define SPI_TX_2 2
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`define SPI_TX_3 3
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`define SPI_CTRL 4
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`define SPI_DEVIDE 5
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`define SPI_SS 6
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//
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//
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// Number of bits in ctrl register
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// Number of bits in ctrl register
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//
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//
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`define SPI_CTRL_BIT_NB 12
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`define SPI_CTRL_BIT_NB 13
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|
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//
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//
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// Control register bit position
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// Control register bit position
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//
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//
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`define SPI_CTRL_ASS 11
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`define SPI_CTRL_ASS 12
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`define SPI_CTRL_IE 10
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`define SPI_CTRL_IE 11
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`define SPI_CTRL_LSB 9
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`define SPI_CTRL_LSB 10
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`define SPI_CTRL_CHAR_LEN 8:3
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`define SPI_CTRL_CHAR_LEN 9:3
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`define SPI_CTRL_TX_NEGEDGE 2
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`define SPI_CTRL_TX_NEGEDGE 2
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`define SPI_CTRL_RX_NEGEDGE 1
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`define SPI_CTRL_RX_NEGEDGE 1
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`define SPI_CTRL_GO 0
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`define SPI_CTRL_GO 0
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