OpenCores
URL https://opencores.org/ocsvn/spi_boot/spi_boot/trunk

Subversion Repositories spi_boot

[/] [spi_boot/] [trunk/] [rtl/] [vhdl/] [chip-mmc-a.vhd] - Diff between revs 40 and 61

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 40 Rev 61
Line 1... Line 1...
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
--
-- SD/MMC Bootloader
-- SD/MMC Bootloader
-- Chip toplevel design with MMC feature set
-- Chip toplevel design with MMC feature set
--
--
-- $Id: chip-mmc-a.vhd,v 1.6 2005-04-07 20:44:23 arniml Exp $
-- $Id: chip-mmc-a.vhd,v 1.7 2007-08-06 23:31:42 arniml Exp $
--
--
-- Copyright (c) 2005, Arnim Laeuger (arniml@opencores.org)
-- Copyright (c) 2005, Arnim Laeuger (arniml@opencores.org)
--
--
-- All rights reserved, see COPYING.
-- All rights reserved, see COPYING.
--
--
Line 50... Line 50...
 
 
architecture mmc of chip is
architecture mmc of chip is
 
 
  component spi_boot
  component spi_boot
    generic (
    generic (
      width_set_sel_g      : integer := 4;
 
      width_bit_cnt_g      : integer := 6;
      width_bit_cnt_g      : integer := 6;
      width_img_cnt_g      : integer := 2;
      width_img_cnt_g      : integer := 2;
      num_bits_per_img_g   : integer := 18;
      num_bits_per_img_g   : integer := 18;
      sd_init_g            : integer := 0;
      sd_init_g            : integer := 0;
      mmc_compat_clk_div_g : integer := 0;
      mmc_compat_clk_div_g : integer := 0;
Line 62... Line 61...
      reset_level_g        : integer := 0
      reset_level_g        : integer := 0
    );
    );
    port (
    port (
      clk_i          : in  std_logic;
      clk_i          : in  std_logic;
      reset_i        : in  std_logic;
      reset_i        : in  std_logic;
      set_sel_i      : in  std_logic_vector(width_set_sel_g-1 downto 0);
      set_sel_i      : in  std_logic_vector(31-width_img_cnt_g-num_bits_per_img_g
 
                                            downto 0);
      spi_clk_o      : out std_logic;
      spi_clk_o      : out std_logic;
      spi_cs_n_o     : out std_logic;
      spi_cs_n_o     : out std_logic;
      spi_data_in_i  : in  std_logic;
      spi_data_in_i  : in  std_logic;
      spi_data_out_o : out std_logic;
      spi_data_out_o : out std_logic;
      spi_en_outs_o  : out std_logic;
      spi_en_outs_o  : out std_logic;
Line 85... Line 85...
  signal spi_clk_s      : std_logic;
  signal spi_clk_s      : std_logic;
  signal spi_cs_n_s     : std_logic;
  signal spi_cs_n_s     : std_logic;
  signal spi_data_out_s : std_logic;
  signal spi_data_out_s : std_logic;
  signal spi_en_outs_s  : std_logic;
  signal spi_en_outs_s  : std_logic;
 
 
  signal set_sel_s      : std_logic_vector(3 downto 0);
  constant width_img_cnt_c    : integer := 2;   -- 4 images
 
  constant num_bits_per_img_c : integer := 18;  -- 256 kByte per image
 
  constant set_sel_width_c    : integer := 31-width_img_cnt_c-num_bits_per_img_c;
 
  signal   set_sel_s          : std_logic_vector(set_sel_width_c downto 0);
 
 
begin
begin
 
 
  set_sel_s <= not set_sel_n_i;
  set_sel_s <= (3 => not set_sel_n_i(3),
 
                2 => not set_sel_n_i(2),
 
                1 => not set_sel_n_i(1),
 
                0 => not set_sel_n_i(0),
 
                others => '0');
 
 
  spi_boot_b : spi_boot
  spi_boot_b : spi_boot
    generic map (
    generic map (
      width_set_sel_g      => 4,        -- 16 sets
 
      width_bit_cnt_g      => 12,       -- 512 bytes per block
      width_bit_cnt_g      => 12,       -- 512 bytes per block
      width_img_cnt_g      => 2,        -- 4 images
      width_img_cnt_g      => width_img_cnt_c,
      num_bits_per_img_g   => 18,       -- 256 kByte per image
      num_bits_per_img_g   => num_bits_per_img_c,
      sd_init_g            => 0,        -- no SD specific initialization
      sd_init_g            => 0,        -- no SD specific initialization
      mmc_compat_clk_div_g => 13,       -- MMC compat 400 kHz > 10 MHz / (13*2)
      mmc_compat_clk_div_g => 13,       -- MMC compat 400 kHz > 10 MHz / (13*2)
      width_mmc_clk_div_g  => 4         -- need 5 bits for MMC compat divider
      width_mmc_clk_div_g  => 4         -- need 5 bits for MMC compat divider
    )
    )
    port map (
    port map (
Line 141... Line 147...
 
 
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- File History:
-- File History:
--
--
-- $Log: not supported by cvs2svn $
-- $Log: not supported by cvs2svn $
 
-- Revision 1.6  2005/04/07 20:44:23  arniml
 
-- add new port detached_o
 
--
-- Revision 1.5  2005/03/09 19:48:34  arniml
-- Revision 1.5  2005/03/09 19:48:34  arniml
-- invert level of set_sel input
-- invert level of set_sel input
--
--
-- Revision 1.4  2005/03/08 22:07:12  arniml
-- Revision 1.4  2005/03/08 22:07:12  arniml
-- added set selection
-- added set selection

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.