URL
https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk
[/] [spi_master_slave/] [trunk/] [syn/] [spi_master_atlys.ucf] - Diff between revs 22 and 24
Show entire file |
Details |
Blame |
View Log
| Rev 22 |
Rev 24 |
| Line 3... |
Line 3... |
# - remove or comment the lines corresponding to unused pins
|
# - remove or comment the lines corresponding to unused pins
|
# - rename the used signals according to the project
|
# - rename the used signals according to the project
|
|
|
|
|
# clock pin for Atlys rev C board
|
# clock pin for Atlys rev C board
|
NET "gclk_i" LOC = "L15"; # Bank = 1, Pin name = IO_L42P_GCLK7_M1UDM, Type = GCLK, Sch name = GCLK
|
#### NET "gclk_i" LOC = "L15"; # Bank = 1, Pin name = IO_L42P_GCLK7_M1UDM, Type = GCLK, Sch name = GCLK
|
|
|
# onBoard USB controller
|
# onBoard USB controller
|
# NET "EppAstb" LOC = "B9"; # Bank = 0, Pin name = IO_L35P_GCLK17, Sch name = U1-FLAGA
|
# NET "EppAstb" LOC = "B9"; # Bank = 0, Pin name = IO_L35P_GCLK17, Sch name = U1-FLAGA
|
# NET "EppDstb" LOC = "A9"; # Bank = 0, Pin name = IO_L35N_GCLK16, Sch name = U1-FLAGB
|
# NET "EppDstb" LOC = "A9"; # Bank = 0, Pin name = IO_L35N_GCLK16, Sch name = U1-FLAGB
|
# NET "UsbFlag" LOC = "C15"; # Bank = 0, Pin name = IO_L64P_SCP5, Sch name = U1-FLAGC
|
# NET "UsbFlag" LOC = "C15"; # Bank = 0, Pin name = IO_L64P_SCP5, Sch name = U1-FLAGC
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.