| Line 63... |
Line 63... |
opb_isr : in std_logic_vector(C_NUM_INT-1 downto 0);
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opb_isr : in std_logic_vector(C_NUM_INT-1 downto 0);
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opb_isr_clr : out std_logic_vector(C_NUM_INT-1 downto 0);
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opb_isr_clr : out std_logic_vector(C_NUM_INT-1 downto 0);
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-- dma register
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-- dma register
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opb_tx_dma_addr : out std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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opb_tx_dma_addr : out std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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opb_tx_dma_ctl : out std_logic_vector(0 downto 0);
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opb_tx_dma_ctl : out std_logic_vector(0 downto 0);
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opb_tx_dma_num : out std_logic_vector(15 downto 0);
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opb_tx_dma_num : out std_logic_vector(C_WIDTH_DMA_NUM-1 downto 0);
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opb_rx_dma_addr : out std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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opb_rx_dma_addr : out std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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opb_rx_dma_ctl : out std_logic_vector(0 downto 0);
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opb_rx_dma_ctl : out std_logic_vector(0 downto 0);
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opb_rx_dma_num : out std_logic_vector(15 downto 0));
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opb_rx_dma_num : out std_logic_vector(C_WIDTH_DMA_NUM-1 downto 0));
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end opb_if;
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end opb_if;
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architecture behavior of opb_if is
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architecture behavior of opb_if is
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| Line 94... |
Line 94... |
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-- only used if C_DMA_EN=true
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-- only used if C_DMA_EN=true
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signal opb_tx_dma_addr_int : std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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signal opb_tx_dma_addr_int : std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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signal opb_tx_dma_ctl_int : std_logic_vector(0 downto 0);
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signal opb_tx_dma_ctl_int : std_logic_vector(0 downto 0);
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signal opb_tx_dma_num_int : std_logic_vector(15 downto 0);
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signal opb_tx_dma_num_int : std_logic_vector(C_WIDTH_DMA_NUM-1 downto 0);
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signal opb_rx_dma_addr_int : std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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signal opb_rx_dma_addr_int : std_logic_vector(C_OPB_DWIDTH-1 downto 0);
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signal opb_rx_dma_ctl_int : std_logic_vector(0 downto 0);
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signal opb_rx_dma_ctl_int : std_logic_vector(0 downto 0);
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signal opb_rx_dma_num_int : std_logic_vector(15 downto 0);
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signal opb_rx_dma_num_int : std_logic_vector(C_WIDTH_DMA_NUM-1 downto 0);
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begin -- behavior
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begin -- behavior
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tx_thresh <= tx_thresh_int;
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tx_thresh <= tx_thresh_int;
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rx_thresh <= rx_thresh_int;
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rx_thresh <= rx_thresh_int;
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| Line 228... |
Line 228... |
Sln_DBus_big_end(C_OPB_DWIDTH-1 downto 0) <= opb_tx_dma_addr_int;
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Sln_DBus_big_end(C_OPB_DWIDTH-1 downto 0) <= opb_tx_dma_addr_int;
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end if;
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end if;
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when C_ADR_TX_DMA_NUM =>
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when C_ADR_TX_DMA_NUM =>
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if C_DMA_EN then
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if C_DMA_EN then
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Sln_DBus_big_end(15 downto 0) <= opb_tx_dma_num_int;
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Sln_DBus_big_end(C_WIDTH_DMA_NUM-1 downto 0) <= opb_tx_dma_num_int;
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end if;
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end if;
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when C_ADR_RX_DMA_CTL =>
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when C_ADR_RX_DMA_CTL =>
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if C_DMA_EN then
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if C_DMA_EN then
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| Line 244... |
Line 244... |
Sln_DBus_big_end(C_OPB_DWIDTH-1 downto 0) <= opb_rx_dma_addr_int;
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Sln_DBus_big_end(C_OPB_DWIDTH-1 downto 0) <= opb_rx_dma_addr_int;
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end if;
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end if;
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when C_ADR_RX_DMA_NUM =>
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when C_ADR_RX_DMA_NUM =>
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if C_DMA_EN then
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if C_DMA_EN then
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Sln_DBus_big_end(15 downto 0) <= opb_rx_dma_num_int;
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Sln_DBus_big_end(C_WIDTH_DMA_NUM-1 downto 0) <= opb_rx_dma_num_int;
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end if;
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end if;
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when others =>
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when others =>
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| Line 291... |
Line 291... |
opb_tx_dma_addr_int <= OPB_DBus_big_end(C_OPB_DWIDTH-1 downto 0);
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opb_tx_dma_addr_int <= OPB_DBus_big_end(C_OPB_DWIDTH-1 downto 0);
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end if;
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end if;
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when C_ADR_TX_DMA_NUM =>
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when C_ADR_TX_DMA_NUM =>
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if C_DMA_EN then
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if C_DMA_EN then
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opb_tx_dma_num_int <= OPB_DBus_big_end(15 downto 0);
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opb_tx_dma_num_int <= OPB_DBus_big_end(C_WIDTH_DMA_NUM-1 downto 0);
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end if;
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end if;
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when C_ADR_RX_DMA_CTL =>
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when C_ADR_RX_DMA_CTL =>
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if C_DMA_EN then
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if C_DMA_EN then
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opb_rx_dma_ctl_int <= OPB_DBus_big_end(0 downto 0);
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opb_rx_dma_ctl_int <= OPB_DBus_big_end(0 downto 0);
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| Line 306... |
Line 306... |
opb_rx_dma_addr_int <= OPB_DBus_big_end(C_OPB_DWIDTH-1 downto 0);
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opb_rx_dma_addr_int <= OPB_DBus_big_end(C_OPB_DWIDTH-1 downto 0);
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end if;
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end if;
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when C_ADR_RX_DMA_NUM =>
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when C_ADR_RX_DMA_NUM =>
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if C_DMA_EN then
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if C_DMA_EN then
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opb_rx_dma_num_int <= OPB_DBus_big_end(15 downto 0);
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opb_rx_dma_num_int <= OPB_DBus_big_end(C_WIDTH_DMA_NUM-1 downto 0);
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end if;
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end if;
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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