| Line 53... |
Line 53... |
wire [`NUM_PORTS-1:0] p2f_drdy; // From fib_arb of sd_rrslow.v
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wire [`NUM_PORTS-1:0] p2f_drdy; // From fib_arb of sd_rrslow.v
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wire [3:0] p2f_srdy; // From p0 of port_macro.v, ...
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wire [3:0] p2f_srdy; // From p0 of port_macro.v, ...
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wire [`PAR_DATA_SZ-1:0] ppi_data; // From fib_arb of sd_rrslow.v
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wire [`PAR_DATA_SZ-1:0] ppi_data; // From fib_arb of sd_rrslow.v
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wire ppi_drdy; // From fib_lookup of fib_lookup.v
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wire ppi_drdy; // From fib_lookup of fib_lookup.v
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wire ppi_srdy; // From fib_arb of sd_rrslow.v
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wire ppi_srdy; // From fib_arb of sd_rrslow.v
|
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wire [`NUM_PORTS-1:0] rarb_ack; // From ring_arb of ring_arb.v
|
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wire [3:0] rarb_req; // From p0 of port_macro.v, ...
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wire ri_drdy_0; // From p0 of port_macro.v
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wire ri_drdy_0; // From p0 of port_macro.v
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wire ri_drdy_1; // From p1 of port_macro.v
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wire ri_drdy_1; // From p1 of port_macro.v
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wire ri_drdy_2; // From p2 of port_macro.v
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wire ri_drdy_2; // From p2 of port_macro.v
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wire ri_drdy_3; // From p3 of port_macro.v
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wire ri_drdy_3; // From p3 of port_macro.v
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wire ri_srdy_0; // From p3 of port_macro.v
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wire ri_srdy_0; // From p3 of port_macro.v
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| Line 68... |
Line 70... |
/* port_macro AUTO_TEMPLATE
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/* port_macro AUTO_TEMPLATE
|
(
|
(
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.clk (clk),
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.clk (clk),
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.reset (reset),
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.reset (reset),
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.ri_data (ri_data_@),
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.ri_data (ri_data_@),
|
|
.rarb_\(.*\) (rarb_\1[@]),
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.ro_\(.*\) (ri_\1_@"(% (+ 1 @) 4)"),
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.ro_\(.*\) (ri_\1_@"(% (+ 1 @) 4)"),
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.p2f_srdy (p2f_srdy[@]),
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.p2f_srdy (p2f_srdy[@]),
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.p2f_drdy (p2f_drdy[@]),
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.p2f_drdy (p2f_drdy[@]),
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.fli_srdy (flo_srdy[@]),
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.fli_srdy (flo_srdy[@]),
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.fli_drdy (flo_drdy[@]),
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.fli_drdy (flo_drdy[@]),
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| Line 81... |
Line 84... |
*/
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*/
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port_macro #(0) p0
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port_macro #(0) p0
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(/*AUTOINST*/
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(/*AUTOINST*/
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// Outputs
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// Outputs
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.ro_data (ri_data_1), // Templated
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.ro_data (ri_data_1), // Templated
|
|
.rarb_req (rarb_req[0]), // Templated
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.fli_drdy (flo_drdy[0]), // Templated
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.fli_drdy (flo_drdy[0]), // Templated
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.gmii_tx_en (gmii_tx_en_0), // Templated
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.gmii_tx_en (gmii_tx_en_0), // Templated
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.gmii_txd (gmii_txd_0[7:0]), // Templated
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.gmii_txd (gmii_txd_0[7:0]), // Templated
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.p2f_data (p2f_data_0[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_data (p2f_data_0[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_srdy (p2f_srdy[0]), // Templated
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.p2f_srdy (p2f_srdy[0]), // Templated
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| Line 98... |
Line 102... |
.fli_srdy (flo_srdy[0]), // Templated
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.fli_srdy (flo_srdy[0]), // Templated
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.gmii_rx_clk (gmii_rx_clk_0), // Templated
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.gmii_rx_clk (gmii_rx_clk_0), // Templated
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.gmii_rx_dv (gmii_rx_dv_0), // Templated
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.gmii_rx_dv (gmii_rx_dv_0), // Templated
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.gmii_rxd (gmii_rxd_0[7:0]), // Templated
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.gmii_rxd (gmii_rxd_0[7:0]), // Templated
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.p2f_drdy (p2f_drdy[0]), // Templated
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.p2f_drdy (p2f_drdy[0]), // Templated
|
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.rarb_ack (rarb_ack[0]), // Templated
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.ri_srdy (ri_srdy_0), // Templated
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.ri_srdy (ri_srdy_0), // Templated
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.ro_drdy (ri_drdy_1)); // Templated
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.ro_drdy (ri_drdy_1)); // Templated
|
|
|
port_macro #(1) p1
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port_macro #(1) p1
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(/*AUTOINST*/
|
(/*AUTOINST*/
|
// Outputs
|
// Outputs
|
.ro_data (ri_data_2), // Templated
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.ro_data (ri_data_2), // Templated
|
|
.rarb_req (rarb_req[1]), // Templated
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.fli_drdy (flo_drdy[1]), // Templated
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.fli_drdy (flo_drdy[1]), // Templated
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.gmii_tx_en (gmii_tx_en_1), // Templated
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.gmii_tx_en (gmii_tx_en_1), // Templated
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.gmii_txd (gmii_txd_1[7:0]), // Templated
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.gmii_txd (gmii_txd_1[7:0]), // Templated
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.p2f_data (p2f_data_1[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_data (p2f_data_1[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_srdy (p2f_srdy[1]), // Templated
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.p2f_srdy (p2f_srdy[1]), // Templated
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| Line 122... |
Line 128... |
.fli_srdy (flo_srdy[1]), // Templated
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.fli_srdy (flo_srdy[1]), // Templated
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.gmii_rx_clk (gmii_rx_clk_1), // Templated
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.gmii_rx_clk (gmii_rx_clk_1), // Templated
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.gmii_rx_dv (gmii_rx_dv_1), // Templated
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.gmii_rx_dv (gmii_rx_dv_1), // Templated
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.gmii_rxd (gmii_rxd_1[7:0]), // Templated
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.gmii_rxd (gmii_rxd_1[7:0]), // Templated
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.p2f_drdy (p2f_drdy[1]), // Templated
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.p2f_drdy (p2f_drdy[1]), // Templated
|
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.rarb_ack (rarb_ack[1]), // Templated
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.ri_srdy (ri_srdy_1), // Templated
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.ri_srdy (ri_srdy_1), // Templated
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.ro_drdy (ri_drdy_2)); // Templated
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.ro_drdy (ri_drdy_2)); // Templated
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|
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port_macro #(2) p2
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port_macro #(2) p2
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(/*AUTOINST*/
|
(/*AUTOINST*/
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// Outputs
|
// Outputs
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.ro_data (ri_data_3), // Templated
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.ro_data (ri_data_3), // Templated
|
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.rarb_req (rarb_req[2]), // Templated
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.fli_drdy (flo_drdy[2]), // Templated
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.fli_drdy (flo_drdy[2]), // Templated
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.gmii_tx_en (gmii_tx_en_2), // Templated
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.gmii_tx_en (gmii_tx_en_2), // Templated
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.gmii_txd (gmii_txd_2[7:0]), // Templated
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.gmii_txd (gmii_txd_2[7:0]), // Templated
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.p2f_data (p2f_data_2[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_data (p2f_data_2[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_srdy (p2f_srdy[2]), // Templated
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.p2f_srdy (p2f_srdy[2]), // Templated
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| Line 146... |
Line 154... |
.fli_srdy (flo_srdy[2]), // Templated
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.fli_srdy (flo_srdy[2]), // Templated
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.gmii_rx_clk (gmii_rx_clk_2), // Templated
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.gmii_rx_clk (gmii_rx_clk_2), // Templated
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.gmii_rx_dv (gmii_rx_dv_2), // Templated
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.gmii_rx_dv (gmii_rx_dv_2), // Templated
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.gmii_rxd (gmii_rxd_2[7:0]), // Templated
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.gmii_rxd (gmii_rxd_2[7:0]), // Templated
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.p2f_drdy (p2f_drdy[2]), // Templated
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.p2f_drdy (p2f_drdy[2]), // Templated
|
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.rarb_ack (rarb_ack[2]), // Templated
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.ri_srdy (ri_srdy_2), // Templated
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.ri_srdy (ri_srdy_2), // Templated
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.ro_drdy (ri_drdy_3)); // Templated
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.ro_drdy (ri_drdy_3)); // Templated
|
|
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port_macro #(3) p3
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port_macro #(3) p3
|
(/*AUTOINST*/
|
(/*AUTOINST*/
|
// Outputs
|
// Outputs
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.ro_data (ri_data_0), // Templated
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.ro_data (ri_data_0), // Templated
|
|
.rarb_req (rarb_req[3]), // Templated
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.fli_drdy (flo_drdy[3]), // Templated
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.fli_drdy (flo_drdy[3]), // Templated
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.gmii_tx_en (gmii_tx_en_3), // Templated
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.gmii_tx_en (gmii_tx_en_3), // Templated
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.gmii_txd (gmii_txd_3[7:0]), // Templated
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.gmii_txd (gmii_txd_3[7:0]), // Templated
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.p2f_data (p2f_data_3[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_data (p2f_data_3[`PAR_DATA_SZ-1:0]), // Templated
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.p2f_srdy (p2f_srdy[3]), // Templated
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.p2f_srdy (p2f_srdy[3]), // Templated
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| Line 170... |
Line 180... |
.fli_srdy (flo_srdy[3]), // Templated
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.fli_srdy (flo_srdy[3]), // Templated
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.gmii_rx_clk (gmii_rx_clk_3), // Templated
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.gmii_rx_clk (gmii_rx_clk_3), // Templated
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.gmii_rx_dv (gmii_rx_dv_3), // Templated
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.gmii_rx_dv (gmii_rx_dv_3), // Templated
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.gmii_rxd (gmii_rxd_3[7:0]), // Templated
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.gmii_rxd (gmii_rxd_3[7:0]), // Templated
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.p2f_drdy (p2f_drdy[3]), // Templated
|
.p2f_drdy (p2f_drdy[3]), // Templated
|
|
.rarb_ack (rarb_ack[3]), // Templated
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.ri_srdy (ri_srdy_3), // Templated
|
.ri_srdy (ri_srdy_3), // Templated
|
.ro_drdy (ri_drdy_0)); // Templated
|
.ro_drdy (ri_drdy_0)); // Templated
|
|
|
/* sd_rrslow AUTO_TEMPLATE
|
/* sd_rrslow AUTO_TEMPLATE
|
(
|
(
|
| Line 209... |
Line 220... |
.reset (reset),
|
.reset (reset),
|
.ppi_data (ppi_data[`PAR_DATA_SZ-1:0]),
|
.ppi_data (ppi_data[`PAR_DATA_SZ-1:0]),
|
.flo_drdy (flo_drdy[`NUM_PORTS-1:0]),
|
.flo_drdy (flo_drdy[`NUM_PORTS-1:0]),
|
.ppi_srdy (ppi_srdy));
|
.ppi_srdy (ppi_srdy));
|
|
|
|
ring_arb ring_arb
|
|
(/*AUTOINST*/
|
|
// Outputs
|
|
.rarb_ack (rarb_ack[`NUM_PORTS-1:0]),
|
|
// Inputs
|
|
.clk (clk),
|
|
.reset (reset),
|
|
.rarb_req (rarb_req[`NUM_PORTS-1:0]));
|
|
|
endmodule // bridge_ex1
|
endmodule // bridge_ex1
|
// Local Variables:
|
// Local Variables:
|
// verilog-library-directories:("." "../../../rtl/verilog/closure" "../../../rtl/verilog/buffers" "../../../rtl/verilog/forks")
|
// verilog-library-directories:("." "../../../rtl/verilog/closure" "../../../rtl/verilog/buffers" "../../../rtl/verilog/forks")
|
// End:
|
// End:
|
|
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No newline at end of file
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No newline at end of file
|
