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URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [rtl/] [sd_rx_gigmac.v] - Diff between revs 24 and 31

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Rev 24 Rev 31
Line 18... Line 18... 
   input [7:0]  gmii_rxd,
 
   input [7:0]  gmii_rxd,
 
 
 
 
 
   output       rxg_srdy,
 
   output       rxg_srdy,
 
   input        rxg_drdy,
 
   input        rxg_drdy,
 
   output [1:0] rxg_code,
 
   output [1:0] rxg_code,
 
   output [7:0] rxg_data
 
   output [7:0] rxg_data,
 
 
 
 
 
 
 
   input        cfg_check_crc
 
   );
 
   );
 
 
 
 
 
  reg           rxdv1, rxdv2;
 
  reg           rxdv1, rxdv2;
 
  reg [7:0]      rxd1, rxd2;
 
  reg [7:0]      rxd1, rxd2;
 
  reg [31:0]    pkt_crc;
 
  reg [31:0]    pkt_crc;
Line 153... Line 155... 
 
 
 
 
        state[s_eop] :
 
        state[s_eop] :
 
          begin
 
          begin
 
            ic_srdy =1;
 
            ic_srdy =1;
 
            ic_data = pkt_crc[31:24];
 
            ic_data = pkt_crc[31:24];
 
            if (pkt_crc == crc)
 
            if ((pkt_crc == crc) | !cfg_check_crc)
 
              begin
 
              begin
 
                ic_code = `PCC_EOP;
 
                ic_code = `PCC_EOP;
 
              end
 
              end
 
            else
 
            else
 
              ic_code = `PCC_BADEOP;
 
              ic_code = `PCC_BADEOP;

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