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Line 17... |
#(parameter width=8,
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#(parameter width=8,
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parameter items=64,
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parameter items=64,
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parameter use_txid=0,
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parameter use_txid=0,
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parameter use_mask=0,
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parameter use_mask=0,
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parameter txid_sz=2,
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parameter txid_sz=2,
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parameter asz=$clog2(items))
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parameter asz=6) //log2(items))
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(input clk,
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(input clk,
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input reset,
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input reset,
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input c_srdy,
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input c_srdy,
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output c_drdy,
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output c_drdy,
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Line 35... |
Line 35... |
input p_drdy,
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input p_drdy,
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output [txid_sz-1:0] p_txid,
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output [txid_sz-1:0] p_txid,
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output [width-1:0] p_data
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output [width-1:0] p_data
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);
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);
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localparam tot_in_sz = width*2+txid_sz+asz+1;
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localparam tot_in_sz = ((use_mask)?width*2:width)+
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((use_txid)?txid_sz:0)+asz+1;
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wire ip_req_type; // 0=read, 1=write
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wire ip_req_type; // 0=read, 1=write
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wire [txid_sz-1:0] ip_txid;
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wire [txid_sz-1:0] ip_txid;
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wire [width-1:0] ip_mask;
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wire [width-1:0] ip_mask;
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wire [width-1:0] ip_data;
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wire [width-1:0] ip_data;
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Line 47... |
Line 48... |
wire [txid_sz-1:0] ic_txid;
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wire [txid_sz-1:0] ic_txid;
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wire [width-1:0] ic_data;
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wire [width-1:0] ic_data;
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/*AUTOWIRE*/
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/*AUTOWIRE*/
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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wire [asz-1:0] addr; // From fsm of sd_scoreboard_fsm.v
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wire [(asz)-1:0] addr; // From fsm of sd_scoreboard_fsm.v
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wire [width-1:0] d_in; // From fsm of sd_scoreboard_fsm.v
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wire [(width)-1:0] d_in; // From fsm of sd_scoreboard_fsm.v
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wire [width-1:0] d_out; // From sb_mem of behave1p_mem.v
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wire [(width)-1:0] d_out; // From sb_mem of behave1p_mem.v
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wire ic_drdy; // From outhold of sd_output.v
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wire ic_drdy; // From outhold of sd_output.v
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wire ic_srdy; // From fsm of sd_scoreboard_fsm.v
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wire ic_srdy; // From fsm of sd_scoreboard_fsm.v
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wire ip_drdy; // From fsm of sd_scoreboard_fsm.v
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wire ip_drdy; // From fsm of sd_scoreboard_fsm.v
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wire ip_srdy; // From inhold of sd_input.v
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wire ip_srdy; // From inhold of sd_input.v
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wire rd_en; // From fsm of sd_scoreboard_fsm.v
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wire rd_en; // From fsm of sd_scoreboard_fsm.v
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wire wr_en; // From fsm of sd_scoreboard_fsm.v
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wire wr_en; // From fsm of sd_scoreboard_fsm.v
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// End of automatics
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// End of automatics
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wire [tot_in_sz-1:0] c_hold_data, p_hold_data;
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generate if ((use_txid == 1) && (use_mask == 1))
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begin : txid_and_mask
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assign c_hold_data = {c_txid,c_req_type,c_itemid,c_mask,c_data};
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assign {ip_txid,ip_req_type,ip_itemid,ip_mask,ip_data} = p_hold_data;
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end
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else if ((use_txid == 0) && (use_mask == 1))
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begin : no_txid_and_mask
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assign c_hold_data = {c_req_type,c_itemid,c_mask,c_data};
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assign {ip_req_type,ip_itemid,ip_mask,ip_data} = p_hold_data;
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assign ip_mask = 0;
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end
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else if ((use_txid == 1) && (use_mask == 0))
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begin : txid_and_no_mask
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assign c_hold_data = {c_txid,c_req_type,c_itemid,c_data};
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assign {ip_txid,ip_req_type,ip_itemid,ip_data} = p_hold_data;
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assign ip_txid = 0;
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end
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else if ((use_txid == 0) && (use_mask == 0))
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begin : no_txid_no_mask
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assign c_hold_data = {c_req_type,c_itemid,c_data};
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assign {ip_req_type,ip_itemid,ip_data} = p_hold_data;
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assign ip_mask = 0;
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assign ip_txid = 0;
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end
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endgenerate
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sd_input #(.width(tot_in_sz)) inhold
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sd_input #(.width(tot_in_sz)) inhold
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(
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(
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.c_data ({c_txid,c_req_type,c_itemid,c_mask,c_data}),
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.c_data (c_hold_data),
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.ip_data ({ip_txid,ip_req_type,ip_itemid,ip_mask,ip_data}),
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.ip_data (p_hold_data),
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/*AUTOINST*/
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/*AUTOINST*/
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// Outputs
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// Outputs
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.c_drdy (c_drdy),
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.c_drdy (c_drdy),
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.ip_srdy (ip_srdy),
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.ip_srdy (ip_srdy),
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// Inputs
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// Inputs
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.clk (clk),
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.clk (clk),
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.reset (reset),
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.reset (reset),
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.c_srdy (c_srdy),
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.c_srdy (c_srdy),
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.ip_drdy (ip_drdy));
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.ip_drdy (ip_drdy));
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behave1p_mem #(.depth(items), .width(width)) sb_mem
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behave1p_mem #(.depth(items),
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.addr_sz (asz), /*AUTOINSTPARAM*/
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// Parameters
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.width (width)) sb_mem
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(
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(
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.addr (addr[asz-1:0]),
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.addr (addr[asz-1:0]),
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/*AUTOINST*/
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/*AUTOINST*/
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// Outputs
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// Outputs
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.d_out (d_out[width-1:0]),
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.d_out (d_out[(width)-1:0]),
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// Inputs
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// Inputs
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.wr_en (wr_en),
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.wr_en (wr_en),
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.rd_en (rd_en),
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.rd_en (rd_en),
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.clk (clk),
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.clk (clk),
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.d_in (d_in[width-1:0]));
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.d_in (d_in[(width)-1:0]));
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sd_scoreboard_fsm #(width,items,use_txid,use_mask,txid_sz) fsm
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sd_scoreboard_fsm #(/*AUTOINSTPARAM*/
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// Parameters
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.width (width),
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.items (items),
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.use_txid (use_txid),
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.use_mask (use_mask),
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.txid_sz (txid_sz),
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.asz (asz)) fsm
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(/*AUTOINST*/
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(/*AUTOINST*/
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// Outputs
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// Outputs
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.ip_drdy (ip_drdy),
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.ip_drdy (ip_drdy),
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.ic_srdy (ic_srdy),
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.ic_srdy (ic_srdy),
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.ic_txid (ic_txid[txid_sz-1:0]),
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.ic_txid (ic_txid[(txid_sz)-1:0]),
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.ic_data (ic_data[width-1:0]),
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.ic_data (ic_data[(width)-1:0]),
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.wr_en (wr_en),
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.wr_en (wr_en),
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.rd_en (rd_en),
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.rd_en (rd_en),
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.d_in (d_in[width-1:0]),
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.d_in (d_in[(width)-1:0]),
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.addr (addr[asz-1:0]),
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.addr (addr[(asz)-1:0]),
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// Inputs
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// Inputs
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.clk (clk),
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.clk (clk),
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.reset (reset),
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.reset (reset),
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.ip_srdy (ip_srdy),
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.ip_srdy (ip_srdy),
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.ip_req_type (ip_req_type),
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.ip_req_type (ip_req_type),
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.ip_txid (ip_txid[txid_sz-1:0]),
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.ip_txid (ip_txid[(txid_sz)-1:0]),
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.ip_mask (ip_mask[width-1:0]),
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.ip_mask (ip_mask[(width)-1:0]),
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.ip_data (ip_data[width-1:0]),
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.ip_data (ip_data[(width)-1:0]),
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.ip_itemid (ip_itemid[asz-1:0]),
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.ip_itemid (ip_itemid[(asz)-1:0]),
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.ic_drdy (ic_drdy),
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.ic_drdy (ic_drdy),
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.d_out (d_out[width-1:0]));
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.d_out (d_out[(width)-1:0]));
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sd_output #(.width(width+txid_sz)) outhold
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sd_output #(.width(width+txid_sz)) outhold
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(
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(
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.p_data ({p_txid,p_data}),
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.p_data ({p_txid,p_data}),
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.ic_data ({ic_txid,ic_data}),
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.ic_data ({ic_txid,ic_data}),
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Line 127... |
Line 166... |
// Local Variables:
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// Local Variables:
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// verilog-library-directories:("." "../closure" "../memory")
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// verilog-library-directories:("." "../closure" "../memory")
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// End:
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// End:
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