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Line 1... |
/*******************************************************************************
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/*******************************************************************************
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*
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*
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* Copyright 2012-2014, Sinclair R.F., Inc.
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* Copyright 2012-2015, Sinclair R.F., Inc.
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*
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*
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* SSBCC.9x8 -- Small Stack Based Computer Compiler, 9-bit opcode, 8-bit data.
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* SSBCC.9x8 -- Small Stack Based Computer Compiler, 9-bit opcode, 8-bit data.
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*
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*
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* The repository for this open-source project is at
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* The repository for this open-source project is at
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* https://github.com/sinclairrf/SSBCC
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* https://github.com/sinclairrf/SSBCC
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// opcode = 000000_xxx
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// opcode = 000000_xxx
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// shifter operations (including "nop" as no shift)
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// shifter operations (including "nop" as no shift)
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// 6-input LUT formulation -- 3-bit opcode, 3 bits of T centered at current bit
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// 6-input LUT formulation -- 3-bit opcode, 3 bits of T centered at current bit
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reg [7:0] s_math_rotate;
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reg [7:0] s_math_rotate;
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always @ (s_T,s_opcode)
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always @ (s_T,s_opcode)
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//@SSBCC@ interrupt__s_math_rotate
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case (s_opcode[0+:3])
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case (s_opcode[0+:3])
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3'b000 : s_math_rotate = s_T; // nop
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3'b000 : s_math_rotate = s_T; // nop
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3'b001 : s_math_rotate = { s_T[0+:7], 1'b0 }; // <<0
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3'b001 : s_math_rotate = { s_T[0+:7], 1'b0 }; // <<0
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3'b010 : s_math_rotate = { s_T[0+:7], 1'b1 }; // <<1
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3'b010 : s_math_rotate = { s_T[0+:7], 1'b1 }; // <<1
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3'b011 : s_math_rotate = { s_T[0+:7], s_T[7] }; // <<msb
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3'b011 : s_math_rotate = { s_T[0+:7], s_T[7] }; // <<msb
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s_bus_n = C_BUS_N_N;
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s_bus_n = C_BUS_N_N;
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s_stack = C_STACK_NOP;
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s_stack = C_STACK_NOP;
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s_inport = 1'b0;
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s_inport = 1'b0;
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s_outport = 1'b0;
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s_outport = 1'b0;
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s_mem_wr = 1'b0;
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s_mem_wr = 1'b0;
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//@SSBCC@ interrupt__s_opcode
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if (s_opcode[8] == 1'b1) begin // push
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if (s_opcode[8] == 1'b1) begin // push
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s_bus_t = C_BUS_T_OPCODE;
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s_bus_t = C_BUS_T_OPCODE;
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s_bus_n = C_BUS_N_T;
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s_bus_n = C_BUS_N_T;
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s_stack = C_STACK_INC;
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s_stack = C_STACK_INC;
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end else if (s_opcode[7] == 1'b1) begin // jump, jumpc, call, callc
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end else if (s_opcode[7] == 1'b1) begin // jump, jumpc, call, callc
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Line 303... |
* Operate the MUXes
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* Operate the MUXes
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*
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*
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******************************************************************************/
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******************************************************************************/
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// non-clocked PC required for shadow register in SRAM blocks
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// non-clocked PC required for shadow register in SRAM blocks
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reg [C_PC_WIDTH-1:0] s_PC_next;
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//@SSBCC@ s_PC_next
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always @ (*)
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case (s_bus_pc)
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C_BUS_PC_NORMAL:
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s_PC_next = s_PC_plus1;
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C_BUS_PC_JUMP:
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s_PC_next = s_PC_jump;
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C_BUS_PC_RETURN:
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s_PC_next = s_R[0+:C_PC_WIDTH];
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default:
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s_PC_next = s_PC_plus1;
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endcase
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// Return stack candidate
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// Return stack candidate
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reg [C_RETURN_WIDTH-1:0] s_R_pre;
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//@SSBCC@ s_R_pre
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generate
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if (C_PC_WIDTH < 8) begin : gen_r_narrow
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always @ (*)
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case (s_bus_r)
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C_BUS_R_T:
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s_R_pre = s_T;
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C_BUS_R_PC:
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s_R_pre = { {(8-C_PC_WIDTH){1'b0}}, s_PC_plus1 };
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default:
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s_R_pre = s_T;
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endcase
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end else if (C_PC_WIDTH == 8) begin : gen_r_same
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always @ (*)
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case (s_bus_r)
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C_BUS_R_T:
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s_R_pre = s_T;
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C_BUS_R_PC:
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s_R_pre = s_PC_plus1;
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default:
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s_R_pre = s_T;
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endcase
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end else begin : gen_r_wide
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always @ (*)
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case (s_bus_r)
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C_BUS_R_T:
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s_R_pre = { {(C_PC_WIDTH-8){1'b0}}, s_T };
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C_BUS_R_PC:
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s_R_pre = s_PC_plus1;
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default:
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s_R_pre = { {(C_PC_WIDTH-8){1'b0}}, s_T };
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endcase
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end
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endgenerate
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/*******************************************************************************
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/*******************************************************************************
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*
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*
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* run the state machines for the processor components.
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* run the state machines for the processor components.
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*
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*
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