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[/] [ssbcc/] [trunk/] [core/] [9x8/] [display_trace.v] - Diff between revs 7 and 12

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Rev 7 Rev 12
Line 1... Line 1...
 
// Copyright 2013-2015, Sinclair R.F., Inc.
// Display micro controller PC, opcode, and stacks.
// Display micro controller PC, opcode, and stacks.
localparam L__TRACE_SIZE        = C_PC_WIDTH            // pc width
localparam L__TRACE_SIZE        = 1                     // s_interrupt
 
                                + 1                     // s_interrupted
 
                                + C_PC_WIDTH            // pc width
                                + 9                     // opcode width
                                + 9                     // opcode width
                                + C_DATA_PTR_WIDTH      // data stack pointer width
                                + C_DATA_PTR_WIDTH      // data stack pointer width
                                + 1                     // s_N_valid
                                + 1                     // s_N_valid
                                + 8                     // s_N
                                + 8                     // s_N
                                + 1                     // s_T_valid
                                + 1                     // s_T_valid
Line 10... Line 13...
                                + C_RETURN_WIDTH        // s_R
                                + C_RETURN_WIDTH        // s_R
                                + C_RETURN_PTR_WIDTH    // return stack pointer width
                                + C_RETURN_PTR_WIDTH    // return stack pointer width
                                ;
                                ;
task display_trace;
task display_trace;
  input                     [L__TRACE_SIZE-1:0] s_raw;
  input                     [L__TRACE_SIZE-1:0] s_raw;
 
  reg                                   s_interrupt;
 
  reg                                   s_interrupted;
  reg                  [C_PC_WIDTH-1:0] s_PC;
  reg                  [C_PC_WIDTH-1:0] s_PC;
  reg                             [8:0] s_opcode;
  reg                             [8:0] s_opcode;
  reg            [C_DATA_PTR_WIDTH-1:0] s_Np_stack_ptr;
  reg            [C_DATA_PTR_WIDTH-1:0] s_Np_stack_ptr;
  reg                                   s_N_valid;
  reg                                   s_N_valid;
  reg                             [7:0] s_N;
  reg                             [7:0] s_N;
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  reg                                   s_R_valid;
  reg                                   s_R_valid;
  reg              [C_RETURN_WIDTH-1:0] s_R;
  reg              [C_RETURN_WIDTH-1:0] s_R;
  reg          [C_RETURN_PTR_WIDTH-1:0] s_Rw_ptr;
  reg          [C_RETURN_PTR_WIDTH-1:0] s_Rw_ptr;
  reg                         [7*8-1:0] s_opcode_name;
  reg                         [7*8-1:0] s_opcode_name;
  begin
  begin
    { s_PC, s_opcode, s_Np_stack_ptr, s_N_valid, s_N, s_T_valid, s_T, s_R_valid, s_R, s_Rw_ptr } = s_raw;
    { s_interrupt, s_interrupted, s_PC, s_opcode, s_Np_stack_ptr, s_N_valid, s_N, s_T_valid, s_T, s_R_valid, s_R, s_Rw_ptr } = s_raw;
    casez (s_opcode)
    if (s_interrupt)
 
      s_opcode_name = "int    ";
 
    else if (s_interrupted)
 
      s_opcode_name = "nop_int";
 
    else casez (s_opcode)
      9'b00_0000_000 : s_opcode_name = "nop    ";
      9'b00_0000_000 : s_opcode_name = "nop    ";
      9'b00_0000_001 : s_opcode_name = "<<0    ";
      9'b00_0000_001 : s_opcode_name = "<<0    ";
      9'b00_0000_010 : s_opcode_name = "<<1    ";
      9'b00_0000_010 : s_opcode_name = "<<1    ";
      9'b00_0000_011 : s_opcode_name = "<<msb  ";
      9'b00_0000_011 : s_opcode_name = "<<msb  ";
      9'b00_0000_100 : s_opcode_name = "0>>    ";
      9'b00_0000_100 : s_opcode_name = "0>>    ";

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