URL https://opencores.org/ocsvn/ssbcc/ssbcc/trunk

Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [UART_Tx.v] - Diff between revs 6 and 9

Rev 6	Rev 9
Line 1...	Line 1...
`//`	`//`
`// PERIPHERAL UART_Tx: @NAME@`	`// PERIPHERAL UART_Tx: @NAME@`
	`// Copyright 2013-2015 Sinclair R.F., Inc.`
`//`	`//`
`localparam L__OUTFIFO_NBITS = $clog2(@OUTFIFO@);`	`localparam L__OUTFIFO_NBITS = $clog2(@OUTFIFO@);`
`localparam L__COUNT = @BAUDMETHOD@-1;`	`localparam L__COUNT = @BAUDMETHOD@-1;`
`localparam L__COUNT_NBITS = $clog2(L__COUNT+1);`	`localparam L__COUNT_NBITS = $clog2(L__COUNT+1);`
`localparam L__NTX = 1+8+@NSTOP@-1;`	`localparam L__NTX = 1+8+@NSTOP@-1;`
Line 10...	Line 11...
`reg [7:0] s__Tx_data;`	`reg [7:0] s__Tx_data;`
`wire s__Tx_enabled = @ENABLED@;`	`wire s__Tx_enabled = @ENABLED@;`
`reg s__Tx_go;`	`reg s__Tx_go;`
`reg s__Tx_uart_busy;`	`reg s__Tx_uart_busy;`
`if (@OUTFIFO@ == 0) begin : gen__nooutfifo`	`if (@OUTFIFO@ == 0) begin : gen__nooutfifo`
`always @ (s__Tx_uart_busy)`	`always @ (s__Tx_uart_busy, s__Tx_enabled)`
`s__Tx_busy = s__Tx_uart_busy \|\| !s__Tx_enabled;`	`s__Tx_busy = s__Tx_uart_busy \|\| !s__Tx_enabled;`
`always @ (s__Tx)`	`always @ (s__Tx)`
`s__Tx_data = s__Tx;`	`s__Tx_data = s__Tx;`
`always @ (s__Tx_wr)`	`always @ (s__Tx_wr)`
`s__Tx_go = s__Tx_wr;`	`s__Tx_go = s__Tx_wr;`