URL https://opencores.org/ocsvn/ssbcc/ssbcc/trunk

Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [AXI4_Lite_Slave_DualPortRAM/] [tb.v] - Diff between revs 2 and 4

Rev 2	Rev 4
Line 126...	Line 126...
`if (s_bvalid && s_bready)`	`if (s_bvalid && s_bready)`
`s_wr_acks[2] <= 1'b1;`	`s_wr_acks[2] <= 1'b1;`
`end`	`end`

`// Initiate reads and indicate their termination`	`// Initiate reads and indicate their termination`
	`localparam S_INIT_RREADY = 1'b1; // observed Xilinx behavior -- always high`
`initial s_rd_done = 1'b0;`	`initial s_rd_done = 1'b0;`
`reg [1:0] s_rd_acks = 2'b00;`	`reg [1:0] s_rd_acks = 2'b00;`
`reg s_arvalid = 1'b0;`	`reg s_arvalid = 1'b0;`
`reg s_rready = 1'b0;`	`reg s_rready = 1'b0;`
`wire s_arready;`	`wire s_arready;`
`wire s_rvalid;`	`wire s_rvalid;`
`always @ (posedge s_aclk) begin`	`always @ (posedge s_aclk) begin`
`s_rd_done <= 1'b0;`	`s_rd_done <= 1'b0;`
`s_rd_acks <= s_rd_acks;`	`s_rd_acks <= s_rd_acks;`
`s_rready <= 1'b0;`	`s_rready <= S_INIT_RREADY;`
`if (s_rd_acks == 2'b11) begin`	`if (s_rd_acks == 2'b11) begin`
`s_rd_done <= 1'b1;`	`s_rd_done <= 1'b1;`
`s_rd_acks <= 2'b00;`	`s_rd_acks <= 2'b00;`
`end`	`end`
`if (s_rd_go)`	`if (s_rd_go)`
Line 203...	Line 204...

`always @ (posedge s_clk)`	`always @ (posedge s_clk)`
`if (s_done)`	`if (s_done)`
`$finish;`	`$finish;`

	`//initial begin`
	`// $dumpfile("tb.vcd");`
	`// $dumpvars();`
	`//end`

`endmodule`	`endmodule`

`No newline at end of file`	`No newline at end of file`