URL https://opencores.org/ocsvn/ssbcc/ssbcc/trunk

Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [core/] [9x8/] [peripherals/] [tb/] [PWM_8bit/] [tb_PWM_8bit.9x8] - Diff between revs 2 and 13

Rev 2	Rev 13
Line 8...	Line 8...
`INSTRUCTION 128`	`INSTRUCTION 128`
`DATA_STACK 32`	`DATA_STACK 32`
`RETURN_STACK 16`	`RETURN_STACK 16`

`PARAMETER G_CLK_FREQ_HZ 100_000_000`	`PARAMETER G_CLK_FREQ_HZ 100_000_000`
	`CONSTANT C_PWM_CLK_HZ 6000*255`

`PORTCOMMENT allow runts`	`PORTCOMMENT allow runts`
`PERIPHERAL PWM_8bit outport=O_PWM_SR \`	`PERIPHERAL PWM_8bit outport=O_PWM_SR \`
`outsignal=o_pwm_sr \`	`outsignal=o_pwm_sr \`
`ratemethod=G_CLK_FREQ_HZ/(6000*255)`	`ratemethod=G_CLK_FREQ_HZ/C_PWM_CLK_HZ`

`PORTCOMMENT no-runt PWM`	`PORTCOMMENT no-runt PWM`
`PERIPHERAL PWM_8bit outport=O_PWM_SN \`	`PERIPHERAL PWM_8bit outport=O_PWM_SN \`
`outsignal=o_pwm_sn \`	`outsignal=o_pwm_sn \`
`ratemethod=G_CLK_FREQ_HZ/(6000*255) \`	`ratemethod=G_CLK_FREQ_HZ/C_PWM_CLK_HZ \`
`norunt`	`norunt`

`PORTCOMMENT inverted output PWM`	`PORTCOMMENT inverted output PWM`
`PERIPHERAL PWM_8bit outport=O_PWM_SI \`	`PERIPHERAL PWM_8bit outport=O_PWM_SI \`
`outsignal=o_pwm_si \`	`outsignal=o_pwm_si \`
`ratemethod=G_CLK_FREQ_HZ/(6000*255) \`	`ratemethod=G_CLK_FREQ_HZ/C_PWM_CLK_HZ \`
`invert`	`invert`

`PORTCOMMENT 3-channel PWM`	`PORTCOMMENT 3-channel PWM`
`PERIPHERAL PWM_8bit outport=O_PWM_MULTI \`	`PERIPHERAL PWM_8bit outport=O_PWM_MULTI \`
`outsignal=o_pwm_multi \`	`outsignal=o_pwm_multi \`
`ratemethod=100_000_000/(6000*255) \`	`ratemethod=100_000_000/C_PWM_CLK_HZ \`
`instances=3`	`instances=3`

`PORTCOMMENT termination signal`	`PORTCOMMENT termination signal`
`OUTPORT 1-bit o_done O_DONE`	`OUTPORT 1-bit o_done O_DONE`