URL https://opencores.org/ocsvn/ssbcc/ssbcc/trunk

Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [core/] [9x8/] [tb/] [ifdef/] [uc.9x8] - Diff between revs 2 and 12

Rev 2	Rev 12
Line 8...	Line 8...
`DATA_STACK 32`	`DATA_STACK 32`
`RETURN_STACK 32`	`RETURN_STACK 32`

`PARAMETER G_CLK_FREQ_HZ 50_000_000`	`PARAMETER G_CLK_FREQ_HZ 50_000_000`

`.IFDEF INCLUDE_UART`	`.IFDEF D_INCLUDE_UART`
`PORTCOMMENT UART`	`PORTCOMMENT UART`
`PERIPHERAL UART_Tx outport=O_UART_TX \`	`PERIPHERAL UART_Tx outport=O_UART_TX \`
`outstatus=I_UART_TX_BUSY \`	`outstatus=I_UART_TX_BUSY \`
`baudmethod=G_CLK_FREQ_HZ/115200 \`	`baudmethod=G_CLK_FREQ_HZ/115200 \`
`outsignal=o_uart_tx`	`outsignal=o_uart_tx`
`.ENDIF`	`.ENDIF`

`.IFNDEF INCLUDE_I2C`	`.IFNDEF D_INCLUDE_I2C`
`PORTCOMMENT WARNING -- NO I2C BUS`	`PORTCOMMENT WARNING -- NO I2C BUS`
`.ELSE`	`.ELSE`
`PORTCOMMENT I2C bus`	`PORTCOMMENT I2C bus`
`PERIPHERAL open_drain inport=I_SCL \`	`PERIPHERAL open_drain inport=I_SCL \`
`outport=O_SCL \`	`outport=O_SCL \`