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Subversion Repositories ssbcc

[/] [ssbcc/] [trunk/] [todo] - Diff between revs 11 and 12

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Rev 11 Rev 12
Line 20... Line 20...
    add warning for unreachable code following .jump or .return instructions
    add warning for unreachable code following .jump or .return instructions
    add "share memory" feature?
    add "share memory" feature?
      for dual-port memories in slave peripherals (i.e., registers readable by the bus master)
      for dual-port memories in slave peripherals (i.e., registers readable by the bus master)
      for peripherals such as adders where long chains of outputs and inports would have been required and .store+/- and .fetch+/- would be much more efficient code-wise
      for peripherals such as adders where long chains of outputs and inports would have been required and .store+/- and .fetch+/- would be much more efficient code-wise
      how to accommodate multiple "shared memory" peripherals?
      how to accommodate multiple "shared memory" peripherals?
    finish interrupt handling, add monitor-interrupt peripheral to ensure correct re-enable from the interrupt handler
 
    remove dead parameters and dead code
    remove dead parameters and dead code
    rework design as required to make it more robust
    rework design as required to make it more robust
    documentation
    documentation
      top-level overview, point to implemented cores
      top-level overview, point to implemented cores
      required:  ARCHITECTURE and sizes, ASSEMBLY, and HDL
      required:  ARCHITECTURE and sizes, ASSEMBLY, and HDL
Line 43... Line 42...
        directives
        directives
        instructions
        instructions
          change "opcodes.html" to "instructions.html", ...
          change "opcodes.html" to "instructions.html", ...
        parameters
        parameters
        constants
        constants
        interrupts
 
      peripherals
      peripherals
      running the test benches
      running the test benches
    core.v
    core.v
      additional instructions?
      additional instructions?
        "invert" opcode in 6'b000100 group
        "invert" opcode in 6'b000100 group
Line 60... Line 58...
      implement .abbr directive
      implement .abbr directive
      add .if(...) [.elif(...)]* [.else] .endif directive set
      add .if(...) [.elif(...)]* [.else] .endif directive set
        avoid full parsing of false branches (accommodate other cores?)
        avoid full parsing of false branches (accommodate other cores?)
        add symbol for current core -- is9x8 (?)
        add symbol for current core -- is9x8 (?)
    peripherals
    peripherals
      INTERRUPT
 
      interrupt enable/disable (through INTERRUPT command)
 
      multi-byte adder
      multi-byte adder
      multiplier
      multiplier
      PICK -- emulate the Forth operator?
      PICK -- emulate the Forth operator?
        this can be done if the data stack is in its own dual-port memory, but that kinds of defeats the purpose of a small micro controller
        this can be done if the data stack is in its own dual-port memory, but that kinds of defeats the purpose of a small micro controller
      bus slave peripherals -- store external commands in a FIFO and statuses in dual-port RAM or shared RAM for external reads
      bus slave peripherals -- store external commands in a FIFO and statuses in dual-port RAM or shared RAM for external reads

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