| Line 1... |
Line 1... |
-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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--
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--
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-- T400 Microcontroller Core
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-- T400 Microcontroller Core
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--
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--
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-- $Id: t400_core.vhd,v 1.5 2006-05-23 01:13:56 arniml Exp $
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-- $Id: t400_core.vhd,v 1.6 2006-05-27 19:11:33 arniml Exp $
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--
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--
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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| Line 161... |
Line 161... |
signal skip_s,
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signal skip_s,
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skip_lbi_s : boolean;
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skip_lbi_s : boolean;
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signal tim_c_s : boolean;
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signal tim_c_s : boolean;
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|
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signal in_s : dw_t;
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signal in_s : dw_t;
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signal int_s : boolean;
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|
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signal io_g_s : std_logic_vector(io_g_i'range);
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signal io_g_s : std_logic_vector(io_g_i'range);
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|
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signal vdd_s : std_logic;
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signal vdd_s : std_logic;
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signal gnd4_s : dw_t;
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signal gnd4_s : dw_t;
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| Line 289... |
Line 290... |
dec_data_o => dec_data_s,
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dec_data_o => dec_data_s,
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is_lbi_o => is_lbi_s,
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is_lbi_o => is_lbi_s,
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en_o => en_s,
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en_o => en_s,
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skip_i => skip_s,
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skip_i => skip_s,
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skip_lbi_i => skip_lbi_s,
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skip_lbi_i => skip_lbi_s,
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int_i => int_s,
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pm_addr_i => pm_addr_s,
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pm_addr_i => pm_addr_s,
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pm_data_i => pm_data_i
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pm_data_i => pm_data_i
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);
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);
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|
|
|
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- Skip logic
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-- Skip logic
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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skip_b : t400_skip
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skip_b : t400_skip
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generic map (
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opt_type_g => opt_type_g
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)
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port map (
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port map (
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ck_i => ck_i,
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ck_i => ck_i,
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ck_en_i => ck_en_s,
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ck_en_i => ck_en_s,
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por_i => por_s,
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por_i => por_s,
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res_i => res_s,
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res_i => res_s,
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| Line 450... |
Line 455... |
io_in_b : t400_io_in
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io_in_b : t400_io_in
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port map (
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port map (
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ck_i => ck_i,
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ck_i => ck_i,
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ck_en_i => ck_en_s,
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ck_en_i => ck_en_s,
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por_i => por_s,
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por_i => por_s,
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icyc_en_i => icyc_en_s,
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in_en_i => in_en_s,
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in_en_i => in_en_s,
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op_i => io_in_op_s,
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op_i => io_in_op_s,
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en1_i => en_s(1),
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en1_i => en_s(1),
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io_in_i => io_in_i,
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io_in_i => io_in_i,
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in_o => in_s,
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in_o => in_s,
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int_o => open
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int_o => int_s
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);
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);
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end generate;
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end generate;
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|
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no_in: if opt_type_g /= t400_opt_type_420_c generate
|
no_in: if opt_type_g /= t400_opt_type_420_c generate
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in_s <= (others => '0');
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in_s <= (others => '0');
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int_s <= false;
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end generate;
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end generate;
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|
|
|
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-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- SIO module
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-- SIO module
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| Line 520... |
Line 527... |
|
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- File History:
|
-- File History:
|
--
|
--
|
-- $Log: not supported by cvs2svn $
|
-- $Log: not supported by cvs2svn $
|
|
-- Revision 1.5 2006/05/23 01:13:56 arniml
|
|
-- use to_X01 for G input
|
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--
|
-- Revision 1.4 2006/05/22 00:03:29 arniml
|
-- Revision 1.4 2006/05/22 00:03:29 arniml
|
-- io_in added
|
-- io_in added
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--
|
--
|
-- Revision 1.3 2006/05/21 21:47:40 arniml
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-- Revision 1.3 2006/05/21 21:47:40 arniml
|
-- route cko to ALU for INIL instruction
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-- route cko to ALU for INIL instruction
|
