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[/] [t400/] [tags/] [rel_1_1/] [sw/] [verif/] [black_box/] [inil/] [test.asm] - Diff between revs 51 and 59

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Line 1... Line 1...
        ;; *******************************************************************
        ;; *******************************************************************
        ;; $Id: test.asm,v 1.1 2006-05-23 01:11:13 arniml Exp $
        ;; $Id: test.asm,v 1.2 2006-05-24 00:48:04 arniml Exp $
        ;;
        ;;
        ;; Checks the INIL instruction.
        ;; Checks the INIL instruction.
        ;;
        ;;
 
 
        ;; the cpu type is defined on asl's command line
        ;; the cpu type is defined on asl's command line
Line 12... Line 12...
        ;; check reset level of latches
        ;; check reset level of latches
        inil
        inil
        x       0
        x       0
        skmbz   3
        skmbz   3
        jmp     fail
        jmp     fail
 
        skmbz   2               ; CKO
 
        jmp     fail
        skmbz   0
        skmbz   0
        jmp     fail
        jmp     fail
 
 
 
 
        ;; set IN to 0xf and recheck levels
        ;; set IN to 0xf and recheck levels
Line 24... Line 26...
        nop
        nop
        inil
        inil
        x       0
        x       0
        skmbz   3
        skmbz   3
        jmp     fail
        jmp     fail
        skmbz   0
        skmbz   2               ; CKO
 
        jp      +
 
        jmp     fail
 
+       skmbz   0
        jmp     fail
        jmp     fail
 
 
 
 
        ;; set IN0 to 0 and check that IL0 triggered
        ;; set IN0 to 0 and check that IL0 triggered
        ogi     0xe
        ogi     0xe
        nop
        nop
        inil
        inil
        x       0
        x       0
        skmbz   3
        skmbz   3
        jmp     fail
        jmp     fail
        skmbz   0
        skmbz   2               ; CKO
 
        jp      +
 
        jmp     fail
 
+       skmbz   0
        jp      +
        jp      +
        jmp     fail
        jmp     fail
+
+
 
 
 
        jmp     page_1
 
        org     0x040
 
page_1:
 
 
        ;; set IN3 to 0 and check that IL1 triggered
        ;; set IN3 to 0 and check that IL1 triggered
        ogi     0x6
        ogi     0x6
        nop
        nop
        inil
        inil
        x       0
        x       0
        skmbz   3
        skmbz   3
        jp      +
        jp      +
        jmp     fail
        jmp     fail
 
+       skmbz   2               ; CKO
 
        jp      +
 
        jmp     fail
+       skmbz   0
+       skmbz   0
        jmp     fail
        jmp     fail
 
 
 
 
        jmp     page_1
 
        org     0x040
 
page_1:
 
        ;; reload IN3 to trigger both IL latches
        ;; reload IN3 to trigger both IL latches
        ogi     0x9
        ogi     0x9
        ogi     0x0
        ogi     0x0
        nop
        nop
        inil
        inil
        x       0
        x       0
        skmbz   3
        skmbz   3
        jp      +
        jp      +
        jmp     fail
        jmp     fail
+       skmbz   0
+       skmbz   2               ; CKO
 
        jmp     fail
 
        skmbz   0
        jp      +
        jp      +
        jmp     fail
        jmp     fail
+
+
 
 
 
 
Line 79... Line 92...
        ogi     0x0
        ogi     0x0
        inil
        inil
        x       0
        x       0
        skmbz   3
        skmbz   3
        jmp     fail
        jmp     fail
 
        skmbz   2               ; CKO
 
        jmp     fail
        skmbz   0
        skmbz   0
        jmp     fail
        jmp     fail
 
 
 
 
        jmp     pass
        jmp     pass

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