| Line 1... |
Line 1... |
-------------------------------------------------------------------------------
|
-------------------------------------------------------------------------------
|
--
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--
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-- T400 Microcontroller Core
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-- T400 Microcontroller Core
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--
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--
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-- $Id: t400_core.vhd,v 1.6 2006-05-27 19:11:33 arniml Exp $
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-- $Id: t400_core.vhd,v 1.7 2006-06-05 14:19:15 arniml Exp $
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--
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--
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
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--
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--
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-- All rights reserved
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-- All rights reserved
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--
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--
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| Line 286... |
Line 286... |
io_d_op_o => io_d_op_s,
|
io_d_op_o => io_d_op_s,
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io_g_op_o => io_g_op_s,
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io_g_op_o => io_g_op_s,
|
io_in_op_o => io_in_op_s,
|
io_in_op_o => io_in_op_s,
|
sio_op_o => sio_op_s,
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sio_op_o => sio_op_s,
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dec_data_o => dec_data_s,
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dec_data_o => dec_data_s,
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is_lbi_o => is_lbi_s,
|
|
en_o => en_s,
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en_o => en_s,
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skip_i => skip_s,
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skip_i => skip_s,
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skip_lbi_i => skip_lbi_s,
|
skip_lbi_i => skip_lbi_s,
|
|
is_lbi_o => is_lbi_s,
|
int_i => int_s,
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int_i => int_s,
|
pm_addr_i => pm_addr_s,
|
pm_addr_i => pm_addr_s,
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pm_data_i => pm_data_i
|
pm_data_i => pm_data_i
|
);
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);
|
|
|
| Line 314... |
Line 314... |
dec_data_i => dec_data_s,
|
dec_data_i => dec_data_s,
|
carry_i => carry_s,
|
carry_i => carry_s,
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c_i => c_s,
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c_i => c_s,
|
bd_i => b_s(bd_range_t),
|
bd_i => b_s(bd_range_t),
|
is_lbi_i => is_lbi_s,
|
is_lbi_i => is_lbi_s,
|
|
skip_o => skip_s,
|
|
skip_lbi_o => skip_lbi_s,
|
a_i => a_s,
|
a_i => a_s,
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m_i => dm_data_i,
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m_i => dm_data_i,
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g_i => io_g_s,
|
g_i => io_g_s,
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tim_c_i => tim_c_s,
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tim_c_i => tim_c_s
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skip_o => skip_s,
|
|
skip_lbi_o => skip_lbi_s
|
|
);
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);
|
|
|
|
|
-----------------------------------------------------------------------------
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-----------------------------------------------------------------------------
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-- ALU
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-- ALU
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| Line 386... |
Line 386... |
)
|
)
|
port map (
|
port map (
|
ck_i => ck_i,
|
ck_i => ck_i,
|
ck_en_i => ck_en_s,
|
ck_en_i => ck_en_s,
|
por_i => por_s,
|
por_i => por_s,
|
|
in_en_i => in_en_s,
|
op_i => io_l_op_s,
|
op_i => io_l_op_s,
|
en2_i => en_s(2),
|
en2_i => en_s(2),
|
m_i => dm_data_i,
|
m_i => dm_data_i,
|
a_i => a_s,
|
a_i => a_s,
|
pm_data_i => pm_data_i,
|
pm_data_i => pm_data_i,
|
q_o => q_s,
|
q_o => q_s,
|
cs_n_i => vdd_s,
|
cs_n_i => io_in_i(2),
|
rd_n_i => vdd_s,
|
rd_n_i => io_in_i(1),
|
wr_n_i => vdd_s,
|
wr_n_i => io_in_i(3),
|
io_l_i => io_l_i,
|
io_l_i => io_l_i,
|
io_l_o => io_l_o,
|
io_l_o => io_l_o,
|
io_l_en_o => io_l_en_o
|
io_l_en_o => io_l_en_o
|
);
|
);
|
|
|
| Line 527... |
Line 528... |
|
|
-------------------------------------------------------------------------------
|
-------------------------------------------------------------------------------
|
-- File History:
|
-- File History:
|
--
|
--
|
-- $Log: not supported by cvs2svn $
|
-- $Log: not supported by cvs2svn $
|
|
-- Revision 1.6 2006/05/27 19:11:33 arniml
|
|
-- updates for interrupt support
|
|
--
|
-- Revision 1.5 2006/05/23 01:13:56 arniml
|
-- Revision 1.5 2006/05/23 01:13:56 arniml
|
-- use to_X01 for G input
|
-- use to_X01 for G input
|
--
|
--
|
-- Revision 1.4 2006/05/22 00:03:29 arniml
|
-- Revision 1.4 2006/05/22 00:03:29 arniml
|
-- io_in added
|
-- io_in added
|
