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https://opencores.org/ocsvn/t400/t400/trunk
[/] [t400/] [trunk/] [syn/] [t421/] [ep1c12/] [rom_t42x.vhd] - Diff between revs 157 and 163
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| Rev 157 |
Rev 163 |
| Line 11... |
Line 11... |
D : out std_logic_vector(7 downto 0)
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D : out std_logic_vector(7 downto 0)
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);
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);
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end rom_t42x;
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end rom_t42x;
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architecture rtl of rom_t42x is
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architecture rtl of rom_t42x is
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signal A_r : std_logic_vector(9 downto 0);
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begin
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begin
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process (Clk)
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process (Clk)
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begin
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begin
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if Clk'event and Clk = '1' then
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if Clk'event and Clk = '1' then
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A_r <= A;
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case to_integer(unsigned(A)) is
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end if;
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end process;
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process (A_r)
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begin
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case to_integer(unsigned(A_r)) is
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when 000000 => D <= "01000100"; -- 0x0000
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when 000000 => D <= "01000100"; -- 0x0000
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when 000001 => D <= "00110011"; -- 0x0001
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when 000001 => D <= "00110011"; -- 0x0001
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when 000002 => D <= "01011001"; -- 0x0002
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when 000002 => D <= "01011001"; -- 0x0002
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when 000003 => D <= "00110011"; -- 0x0003
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when 000003 => D <= "00110011"; -- 0x0003
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when 000004 => D <= "01010110"; -- 0x0004
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when 000004 => D <= "01010110"; -- 0x0004
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| Line 603... |
Line 597... |
when 000576 => D <= "01000100"; -- 0x0240
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when 000576 => D <= "01000100"; -- 0x0240
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when 000577 => D <= "01100010"; -- 0x0241
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when 000577 => D <= "01100010"; -- 0x0241
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when 000578 => D <= "01000001"; -- 0x0242
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when 000578 => D <= "01000001"; -- 0x0242
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when others => D <= "--------";
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when others => D <= "--------";
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end case;
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end case;
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end if;
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end process;
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end process;
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end;
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end;
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