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[/] [t48/] [tags/] [rel_0_1_beta/] [rtl/] [vhdl/] [p2.vhd] - Diff between revs 32 and 77

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Rev 32 Rev 77
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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--
--
-- The Port 2 unit.
-- The Port 2 unit.
-- Implements the Port 2 logic.
-- Implements the Port 2 logic.
--
--
-- $Id: p2.vhd,v 1.3 2004-03-29 19:39:58 arniml Exp $
-- $Id: p2.vhd,v 1.4 2004-04-24 23:44:25 arniml Exp $
--
--
-- All rights reserved
-- All rights reserved
--
--
-- Redistribution and use in source and synthezised forms, with or without
-- Redistribution and use in source and synthezised forms, with or without
-- modification, are permitted provided that the following conditions are met:
-- modification, are permitted provided that the following conditions are met:
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  );
  );
 
 
end p2;
end p2;
 
 
 
 
library ieee;
 
use ieee.std_logic_arith.conv_integer;
 
use ieee.std_logic_arith.unsigned;
 
 
 
use work.t48_pack.clk_active_c;
use work.t48_pack.clk_active_c;
use work.t48_pack.res_active_c;
use work.t48_pack.res_active_c;
use work.t48_pack.bus_idle_level_c;
use work.t48_pack.bus_idle_level_c;
 
 
architecture rtl of p2 is
architecture rtl of p2 is
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-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
-- File History:
-- File History:
--
--
-- $Log: not supported by cvs2svn $
-- $Log: not supported by cvs2svn $
 
-- Revision 1.3  2004/03/29 19:39:58  arniml
 
-- rename pX_limp to pX_low_imp
 
--
-- Revision 1.2  2004/03/28 13:11:43  arniml
-- Revision 1.2  2004/03/28 13:11:43  arniml
-- rework Port 2 expander handling
-- rework Port 2 expander handling
--
--
-- Revision 1.1  2004/03/23 21:31:53  arniml
-- Revision 1.1  2004/03/23 21:31:53  arniml
-- initial check-in
-- initial check-in

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